2 Ripple adder and sustrater

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University of Texas at San Antonio
Electrical Engineering Department

EE 2511 Lab 2: Ripple Adder and Subtracter

Students :

Francisco Bossio

Chris Farquer

Kevin Fields

Chris MorrisLab Instructor:

August Allo, Jr.

Date Performed: September 20, 2010

EE 2511 Lab 2: Ripple Adder and Subtracter
Due 27SEP2010 (001) 29SEP2010 (002)
100 Points
1. Each students mustlayout and manually simulate the following circuits using SimUaid:
2 bit ripple adder by laying out two full adders as discussed in class.
4 bit ripple adder as shown on page 104 of the textbook.
4bit ripple subtracter using the 4 bit parallel adder (as shown on page 106).
4. 2. Verify that each circuit’s functionality is correct by adding 3 (4 for 4 member groups) different pairs of numbers andsubtracting 3 (4 for 4 member groups) different pairs of numbers.

1. Research and discuss carry lookahead adders AND the 74LS283 4-bit binary adder (search the internet for a datasheet). What arethe advantages of the carry lookahead adder when compared to the ripple adder?

1. The report will contain results from part 2 (displayed in a table), screen captures of the schematics, and thediscussion from part 3.

The assignment must be turned in with a coversheet (containing the lab number, lab description, course, student name, date, and instructor’s name) and the report must follow theformat instructions posted on WebCT. You are free to format the coversheet to your own personal preference. A terminating sheet must be attached containing each team members’ name, % contribution tothe assignment (out of 100%), and clearly identify the individual who took the assignment lead. Groups of 4 members will be graded harder as I have higher expectations from groups containingadditional manpower.

a. 2 bit ripple adder by laying out two full adders as discussed in class.

|A |B |A+B |
|0 |0 |0 |
|0...
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