September 1986 Revised February 2000
DM7473 Dual Master-Slave J-K Flip-Flops with Clear and Complementary Outputs
This device contains two independent positive pulse triggered J-K flip-flops with complementary outputs. The J and K data is processed by the flip-flops after a complete clockpulse. While the clock is LOW l'esclave is isolated from the master. On the positive transition of the clock, the data from the J and K inputs is transferred to the master. While the clock is High the J and K inputs are disabled. On the negative transition of the clock, the data from the master is transferred to l'esclave. La logique states of the J and K inputs must not be allowed to change while theclock is High. Data transfers to the outputs on the falling edge of the clock pulse. A LOW logic level on the clear input will reset the outputs regardless of la logique states of the other inputs.
Order Number DM7473N Package Number N14Un paquet Description 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Inputs CLRL H H H H CLK J X L H L H K X L L H H Q L Q0 H L Toggle Outputs Q H Q0 L H
H = High Logic Level L = LOW Logic Level X = Either LOW or High Logic Level = Positive pulse data. the J and K inputs must be held constant while the clock is High. Data is transferred to the outputs on the falling edge of the clock pulse. Q0 = The output logic level before the indicated input conditions wereestablished. Toggle = Each output changes to the complement of its previous level on each (de) haut niveau clock pulse.
© 2000 Fairchild Semiconductor Corporation
Absolute Maximum Ratings(Note 1)
Supply Voltage Input Voltage Operating Free Air Temperature Range Storage Temperature Range 7V 5.5V 0°C to +70°C −65°C to +150°C
Note 1:The “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum ratings. The “Recommended Operating Conditions” table will define the conditions for actual device operation.
Symbol VCC VIH VIL IOH IOL fCLK tW Parameter Supply Voltage (de) haut niveau Input Voltage LOW Level Input Voltage (de) haut niveau Output Current LOW Level Output Current Clock Frequency (Note 3) Pulse Width (Note 3) tSU tH TA Clock High Clock LOW Clear LOW Input Setup Time (Note 2)(Note 3) Input Hold Time (Note 2)(Note 3) Free Air Operating Temperature 0 20 47 25 0↑ 0↓ 0 70 nsns °C ns Min 4.75 2 0.8 −0.4 16 15 Nom 5 Max 5.25 Units V V V mA mA MHz
Note 2: Le symbole (↑, ↓) indicates the edge of the clock pulse is used for reference: (↑) for rising edge, (↓) for falling edge. Note 3: TA = 25°C and V CC = 5V.
over recommended operating free air temperature range (unless otherwise noted) Symbol Parameter Conditions VI VOH VOL II IIH InputClamp Voltage (de) haut niveau Output Voltage LOW Level Output Voltage (de) haut niveau Input Current IIL LOW Level Input Current IOS ICC Short Circuit Output Current Supply Current VCC = Min, II = −12 mA VCC = Min, IOH = Max VIL = Max, VIH = Min VCC = Min, IOL = Max VIH = Min, VIL = Max VCC = Max VI = 2.4V VCC = Max VI = 0.4V VCC = Max (Note 5) VCC = Max, (Note 6) J, K Clock Clear J, K ClockClear −18 18 2.4 3.4 0.2 0.4 1 40 80 80 −1.6 −3.2 −3.2 −55 34 mA mA mA µA Min Typ (Note 4) Max −1.5 Units V V V mA
Input Current @ Max Input Voltage VCC = Max, VI = 5.5V
Note 4: All typicals are at VCC = 5V, TA = 25°C. Note 5: Not more than one output should be shorted at a time. Note 6: With all outputs OPEN, ICC is measured with the Q and Q outputs High in turn. At the time of measurement...