Calculos
The SN54 / 74LS240, 241 and 244 are Octal Buffers and Line Drivers designed to be employed as memory address drivers, clock drivers and bus-oriented transmitters/receivers which provide improved PC board density.
SN54/74LS240 SN54/74LS241 SN54/74LS244
OCTAL BUFFER/ LINE DRIVER WITH 3-STATE OUTPUTS
LOW POWER SCHOTTKY
• Hysteresis at Inputsto Improve Noise Margins • 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers • Input Clamp Diodes Limit High-Speed Termination Effects
LOGIC AND CONNECTION DIAGRAMS DIP (TOP VIEW) SN54 / 74LS240
VCC 2G 20 19 1Y1 18 2A4 1Y2 17 16 2A3 15 1Y3 2A2 1Y4 14 13 12 2A1 11
20 1
J SUFFIX CERAMIC CASE 732-03
20
N SUFFIX PLASTIC CASE 738-03
1
1 1G
2 1A1
3
4
5
61A3
7
8
9
10 GND
2Y4 1A2 2Y3
2Y2 1A4 2Y1
SN54 / 74LS241
VCC 2G 20 19 1Y1 18 2A4 1Y2 17 16 2A3 15 1Y3 2A2 1Y4 14 13 12 2A1 11
20 1
DW SUFFIX SOIC CASE 751D-03
ORDERING INFORMATION
SN54LSXXXJ Ceramic SN74LSXXXN Plastic SN74LSXXXDW SOIC
1 1G 2 1A1 3 4 5 6 1A3 7 8 9 10 GND 2Y4 1A2 2Y3 2Y2 1A4 2Y1
SN54 / 74LS244
VCC 2G 20 19 1Y1 18 2A4 1Y2 17 16 2A3 15 1Y3 2A2 1Y4 1413 12 2A1 11
1 1G
2 1A1
3
4
5
6 1A3
7
8
9
10 GND
2Y4 1A2 2Y3
2Y2 1A4 2Y1
FAST AND LS TTL DATA 5-387
SN54/74LS240 • SN54/74LS241 • SN54/74LS244
TRUTH TABLES SN54 / 74LS240
INPUTS OUTPUT 1G, 2G L L H D L H X H L (Z) 1G, 2G L L H D L H X L H (Z)
SN54 / 74LS244
INPUTS OUTPUT
SN54 / 74LS241
INPUTS 1G L L H D L H X OUTPUT 2G L H (Z) H H L D L H X L H(Z) INPUTS OUTPUT
H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial Z = HIGH Impedance
GUARANTEED OPERATING RANGES
Symbol VCC TA IOH Supply Voltage Operating Ambient Temperature Range Output Current — High Parameter 54 74 54 74 54, 74 54 74 IOL Output Current — Low 54 74 Min 4.5 4.75 – 55 0 Typ 5.0 5.0 25 25 Max 5.5 5.25 125 70 – 3.0 – 12 – 15 12 24 Unit V °C mA mA mA
FAST ANDLS TTL DATA 5-388
SN54/74LS240 • SN54/74LS241 • SN54/74LS244
DC CHARACTERISTICS OVER OPERATING TEMPERATURE RANGE (unless otherwise specified)
Limits Symbol VIH VIL VT+–VT– VIK VOH Parameter Input HIGH Voltage 54 Input LOW Voltage 74 Hysteresis Input Clamp Diode Voltage 54, 74 Output HIGH Voltage 54, 74 54, 74 VOL IOZH IOZL IIH IIL IOS Output LOW Voltage 74 Output Off Current HIGH Output OffCurrent LOW Input HIGH Current 0.1 Input LOW Current Output Short Circuit Current (Note 1) Power Supply Current Total, Output HIGH Total, Output LOW ICC Total at HIGH Z LS240 LS241/244 LS240 LS241/244 – 40 – 0.2 – 225 27 44 46 50 54 mA VCC = MAX 0.35 0.5 20 – 20 20 V µA µA µA mA mA mA 2.0 0.25 0.4 V V 2.4 0.2 0.4 – 0.65 3.4 – 1.5 0.8 V V V Min 2.0 0.7 V Typ Max Unit V Test Conditions GuaranteedInput HIGH Voltage for All Inputs Guaranteed Input LOW Voltage for All Inputs VCC = MIN VCC = MIN, IIN = – 18 mA VCC = MIN, IOH = – 3.0 mA VCC = MIN, IOH = MAX IOL = 12 mA IOL = 24 mA VCC = VCC MIN, VIN = VIL or VIH per Truth Table
VCC = MAX, VOUT = 2.7 V VCC = MAX, VOUT = 0.4 V VCC = MAX, VIN = 2.7 V VCC = MAX, VIN = 7.0 V VCC = MAX, VIN = 0.4 V VCC = MAX
Note 1: Not more than one outputshould be shorted at a time, nor for more than 1 second.
AC CHARACTERISTICS (TA = 25°C, VCC = 5.0 V)
Limits Symbol tPLH tPHL tPLH tPHL tPZH tPZL tPLZ tPHZ Parameter Propagation Delay, Data to Output LS240 Propagation Delay, Data to Output LS241 / 244 Output Enable Time to HIGH Level Output Enable Time to LOW Level Output Disable Time from LOW Level Output Disable Time from HIGH Level Min Typ 9.012 12 12 15 20 15 10 Max 14 18 18 18 23 30 25 18 Unit ns ns ns ns ns ns CL = 5.0 pF, RL = 667 Ω CL = 45 pF, RL = 667 Ω Test Conditions
FAST AND LS TTL DATA 5-389
SN54/74LS240 • SN54/74LS241 • SN54/74LS244
AC WAVEFORMS
VIN
1.3 V tPLH
1.3 V tPHL 1.3 V
VCC
VOUT
1.3 V
RL
Figure 1
SW1
TO OUTPUT UNDER TEST
VIN
1.3 V tPHL
1.3 V tPLH 1.3 V CL* 5 kΩ
VOUT...
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