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Páginas: 8 (1861 palabras) Publicado: 23 de noviembre de 2012
Using Stencil
Design to Reduce
SMT Defects

Solder paste printing is
known as the root cause
behind assembly defects.
Because yield accounts for
much of the margin, the
greatest opportunity to
improve profits can be
gleaned by eradicating
solder defects. This article
examines some process
adjustments made
through stencil design
and scaling that lead to
assembly-defect reductions.By Paul Lotosky, Michael Murphy, Robert Pearson,
and Michael Tesch

S

older paste printing is understood to be
the leading contributor of defects in the
electronics assembly process. Because
yield accounts for such a large percentage
of the margin, the greatest opportunity
to improve profitability in the assembly of
most electronics can be gained by reducing
or eliminating solderdefects. This article
examines process adjustments made through
stencil design that correct a misalignment
situation between the PCB and stencil, leading to a 43% reduction in assembly defects.
Examples of each are found in Table 1.
The main objective of the solder paste
application process is to deposit the proper
volume of solder paste consistently in the
proper location. There are severalfactors
that can impact an assembler’s ability to do
this. These factors fall into two categories:
manufacturing variables and design variables. Alone or combined, these are the
main causes of nearly all printing defects.
Historically, most companies have
changed stencil designs to solve printrelated defects. This approach, combined
with the self-correcting nature of tin/lead
solderpastes during reflow, helped enough
to see acceptable results. But as companies
have moved to less-forgiving lead-free solder pastes, and have increased the number and distribution of fine-featured components across their boards, it has become
imperative that they uncover and correct
the manufacturing variable that is the real
source of the problem.
34

SMT/April 2006

All tooling machinery hasmanufacturing
tolerances. Machines used to produce PCBs
and stencils are no exception. Generally, PCB
and stencil suppliers will publish manufacturing tolerances. These tolerances are, in many
cases, a restatement of figures that the maker
of the critical piece of equipment that most
influences the precision of the final PCB or
stencil provides. Better-informed suppliers
will base publishedtolerances on data that is
collected as part of ongoing quality monitoring. One of the most significant contributors
to printing defects caused by manufacturing variables is the misalignment of the stencil aperture to the corresponding pad on the
PCB. The problem is that this occurs even
though the PCB and stencil are within their
published tolerances. Both are made from the
same design datafile; however, when made,
the PCB could be on the low end of its manufactured tolerance, while the stencil is on the
high end. This results in poor alignment on

Figure 1. A ligned paste deposited in
Component C.

part or all of the board.
The scenario is a typical SMT assembly
process used to manufacture engine-control
modules. The only difference from a typical
electronic assembly isthat the substrate is a
0.007"-thick, flexible FR-4 board laminated
onto a 0.080"-thick aluminum rigidizer.
Although there are more than 4,200 different component types on this assembly,

TABLE 1

Manufacturing Variables

Design Variables

Mis-registration of stencil aperture and pad
due to PCB stretch and shrinkage

Incorrect stencil thickness

Mis-registration of stencil aperture andpad
due to stencil image stretch and shrinkage

Improper aperture sizes or shapes

Poor PCB support

Poor gasketing due to raised features on
the PCB surface (i.e. legend ink, vias, etc.)

Mis-registration of stencil aperture and pad
due to printer alignment system or error

Inappropriate clearance in the component
layout on the PCB

w ww.smtmag.com

USING STENCIL DESIGN TO...
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