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XR-2211
...the analog plus company TM

FSK Demodulator/ Tone Decoder
June 1997-3

FEATURES D Wide Frequency Range, 0.01Hz to 300kHz D Wide Supply Voltage Range, 4.5V to 20V D HCMOS/TTL/Logic Compatibility D FSK Demodulation, with Carrier Detection D Wide Dynamic Range, 10mV to 3V rms D Adjustable Tracking Range, +1% to 80% D Excellent Temp. Stability, +50ppm/°C, max.

APPLICATIONS DCaller Identification Delivery D FSK Demodulation D Data Synchronization D Tone Decoding D FM Detection D Carrier Detection

GENERAL DESCRIPTION The XR-2211 is a monolithic phase-locked loop (PLL) system especially designed for data communications applications. It is particularly suited for FSK modem applications. It operates over a wide supply voltage range of 4.5 to 20V and a wide frequency rangeof 0.01Hz to 300kHz. It can accommodate analog signals between 10mV and 3V, and can interface with conventional DTL, TTL, and ECL logic families. The circuit consists of a basic PLL for tracking an input signal within the pass band, a quadrature phase detector which provides carrier detection, and an FSK voltage comparator which provides FSK demodulation. External components are used toindependently set center frequency, bandwidth, and output delay. An internal voltage reference proportional to the power supply is provided at an output pin. The XR-2211 is available in 14 pin packages specified for military and industrial temperature ranges.

ORDERING INFORMATION
Part No. XR-2211M XR-2211N XR-2211P XR-2211ID Package 14 Pin CDIP (0.300”) 14 Pin CDIP (0.300”) 14 Pin PDIP (0.300”) 14 LeadSOIC (Jedec, 0.150”) Operating Temperature Range -55°C to +125°C -40°C to +85°C -40°C to +85°C -40°C to +85°C

Rev. 3.01
E1992

EXAR Corporation, 48720 Kato Road, Fremont, CA 94538 z (510) 668-7000 z FAX (510) 668-7017 1

XR-2211
BLOCK DIAGRAM
VCC 1 GND 4 NC 9

Pre Amplifier INP 2 Loop q-Det Lock Detect Comparator

11 3

LDO LDF

TIM C1

14

VCO TIM C2 TIM R VREF COMP I 13 12Internal 10 8 VREF Reference FSK Comp Quad q-Det

6

LDOQ

5

LDOQN

7

DO

Figure 1. XR-2211 Block Diagram

Rev. 3.01 2

XR-2211
PIN CONFIGURATION

VCC INP LDF GND LDOQN LDOQ DO

1 2 3 4 5 6 7

14 13 12 11 10 9 8

TIM C1 TIM C2 TIM R LDO VREF NC COMP I

VCC INP LDF GND LDOQN LDOQ DO

1 2 3 4 5 6 7

14 13 12 11 10 9 8

TIM C1 TIM C2 TIM R LDO VREF NC COMP I14 Lead CDIP, PDIP (0.300”)

14 Lead SOIC (Jedec, 0.150”)

PIN DESCRIPTION
Pin # 1 2 3 4 5 6 7 8 9 10 11 12 13 14 Symbol VCC INP LDF GND LDOQN LDOQ DO COMP I NC VREF LDO TIM R TIM C2 TIM C1 O O I I I O O O I I O Type Description Positive Power Supply. Receive Analog Input. Lock Detect Filter. Ground Pin. Lock Detect Output Not. This output will be low if the VCO is in the capture range. LockDetect Output. This output will be high if the VCO is in the capture range. Data Output. Decoded FSK output. FSK Comparator Input. Not Connected. Internal Voltage Reference. The value of VREF is VCC/2 - 650mV. Loop Detect Output. This output provides the result of the quadrature phase detection. Timing Resistor Input. This pin connects to the timing resistor of the VCO. Timing Capacitor Input. Thetiming capacitor connects between this pin and pin 14. Timing Capacitor Input. The timing capacitor connects between this pin and pin 13.

Rev. 3.01 3

XR-2211
ELECTRICAL CHARACTERISTICS Test Conditions: VCC = 12V, TA = +25°C, RO = 30KW, CO = 0.033mF, unless otherwise specified.
Parameter General Supply Voltage Supply Current Oscillator Section Frequency Accuracy Frequency StabilityTemperature Power Supply Upper Frequency Limit Lowest Practical Operating Frequency Timing Resistor, R0 - See Figure 5 Operating Range Recommended Range Loop Phase Dectector Section Peak Output Current Output Offset Current Output Impedance Maximum Swing Quadrature Phase Detector Peak Output Current Output Impedance Maximum Swing Input Preampt Section Input Impedance Input Signal Voltage Required to...
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