• • • • • PIC16F83 PIC16CR83 PIC16F84 PIC16CR84 PIC16F84A
1.2 Programming Mode
The Programming mode for the PIC16F8X devices allows programming of user program memory, data memory, special locations used for ID, and the configuration word. On PIC16CR8X devices, only data EEPROM and CDP can be programmed.
EEPROM Memory Programming Specification
This document includes theprogramming specifications for the following devices:
PROGRAMMING THE PIC16F8X
RA2 RA3 RA4/T0CKI MCLR VSS RB0/INT RB1 RB2 RB3 •1 2 3 4 5 6 7 8 9 18 17 16 15 14 13 12 11 10 RA1 RA0 OSC1/CLKIN OSC2/CLKOUT VDD RB7 RB6 RB5 RB4
The PIC16F8X devices are programmed using a serial method. The Serial mode will allow these devices to be programmed while in the user’ssystem. This allows for increased design flexibility. This programming specification applies to only the above devices in all packages.
The PIC16F8X devices require one programmable power supply for VDD (4.5V to 5.5V) and a VPP of 12V to 14V. Both supplies should have a minimum resolution of 0.25V.
PIN DESCRIPTIONS (DURINGPROGRAMMING): PIC16F8X
During Programming Function Pin Type I I/O P(1) P P Clock Input Data Input/Output Program Mode Select Power Supply Ground Pin Description
RB6 RB7 MCLR VDD VSS
CLOCK DATA VTEST MODE VDD VSS
Legend: I = Input, O = Output, P = Power Note 1: In the PIC16F8X, the programming high voltage is internally generated. To activate the Programming mode, high voltage needs tobe applied to MCLR input. Since the MCLR is used for a level source, this means that MCLR does not draw any significant current.
2002 Microchip Technology Inc.
PROGRAM MODE ENTRY
User Program Memory Map
The user memory space extends from 0000h to 1FFFh (8 Kbytes), of which 1 Kbyte (0000h - 03FFh) is physically implemented. In actualimplementation, the on-chip user program memory is accessed by the lower 10 bits of the PC, with the upper 3 bits of the PC ignored. Therefore, if the PC is greater than 03FFh, it will wrap around and address a location within the physically implemented memory (see Figure 2-1). In Programming mode, the program memory space extends from 0000h to 3FFFh, with the first half (0000h-1FFFh) being user programmemory and the
second half (2000h-3FFFh) being configuration memory. The PC will increment from 0000h to 1FFFh and wrap to 0000h, or 2000h to 3FFFh and wrap around to 2000h (not to 0000h). Once in configuration memory, the highest bit of the PC stays a ‘1’, thus always pointing to the configuration memory. The only way to point to user program memory is to reset the part and re-enterProgram/Verify mode, as described in Section 2.3. In the configuration memory space, 2000h-200Fh are physically implemented. However, only locations 2000h through 2007h are available. Other locations are reserved. Locations beyond 2000Fh will physically access user memory (see Figure 2-1).
PROGRAM MEMORY MAPPING
0.5K Word 0h 1FFh 3FFh 400h Implemented 1K Word Implemented
Not ImplementedNot Implemented
1FFFh 2000h Implemented 2000 2001 2002 2003 2004 2005 2006 2007 ID Location ID Location ID Location ID Location Reserved Reserved Reserved Configuration Word 3FFFh Not Implemented Not Implemented 2008h Reserved 200Fh Reserved Implemented
2002 Microchip Technology Inc.
2.2 ID Locations
A user may store identification information(ID) in four ID locations, mapped in addresses 2000h through 2003h. It is recommended that the user use only the four Least Significant bits of each ID location. The ID locations read out in an unscrambled fashion after code protection is enabled. It is recommended that ID location is written as “11 1111 1000 bbbb”, where “bbbb” is ID information.
SERIAL PROGRAM/VERIFY OPERATION