8-Bit Microcontroller With 1K Bytes In-System Programmable Flash Attiny13 Attiny13V

Features
• High Performance, Low Power AVR® 8-Bit Microcontroller • Advanced RISC Architecture
– 120 Powerful Instructions – Most Single Clock Cycle Execution – 32 x 8 General Purpose Working Registers – Fully Static Operation – Up to 20 MIPS Througput at 20 MHz High Endurance Non-volatile Memory segments – 1K Bytes of In-System Self-programmable Flash program memory – 64 Bytes EEPROM – 64Bytes Internal SRAM – Write/Erase cyles: 10,000 Flash/100,000 EEPROM – Data retention: 20 years at 85°C/100 years at 25°C (see page 6) – Programming Lock for Self-Programming Flash & EEPROM Data Security Peripheral Features – One 8-bit Timer/Counter with Prescaler and Two PWM Channels – 4-channel, 10-bit ADC with Internal Voltage Reference – Programmable Watchdog Timer with Separate On-chip Oscillator– On-chip Analog Comparator Special Microcontroller Features – debugWIRE On-chip Debug System – In-System Programmable via SPI Port – External and Internal Interrupt Sources – Low Power Idle, ADC Noise Reduction, and Power-down Modes – Enhanced Power-on Reset Circuit – Programmable Brown-out Detection Circuit – Internal Calibrated Oscillator I/O and Packages – 8-pin PDIP/SOIC: Six ProgrammableI/O Lines – 20-pad MLF: Six Programmable I/O Lines Operating Voltage: – 1.8 - 5.5V for ATtiny13V – 2.7 - 5.5V for ATtiny13 Speed Grade – ATtiny13V: 0 - 4 MHz @ 1.8 - 5.5V, 0 - 10 MHz @ 2.7 - 5.5V – ATtiny13: 0 - 10 MHz @ 2.7 - 5.5V, 0 - 20 MHz @ 4.5 - 5.5V Industrial Temperature Range Low Power Consumption – Active Mode: • 1 MHz, 1.8V: 240 µA – Power-down Mode: • < 0.1 µA at 1.8V

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•8-bit Microcontroller with 1K Bytes In-System Programmable Flash ATtiny13 ATtiny13V

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Rev. 2535J–AVR–08/10

1. Pin Configurations
Figure 1-1. Pinout ATtiny13/ATtiny13V

8-PDIP/SOIC
(PCINT5/RESET/ADC0/dW) PB5 (PCINT3/CLKI/ADC3) PB3 (PCINT4/ADC2) PB4 GND 1 2 3 4 8 7 6 5 VCC PB2 (SCK/ADC1/T0/PCINT2) PB1 (MISO/AIN1/OC0B/INT0/PCINT1) PB0 (MOSI/AIN0/OC0A/PCINT0)20-QFN/MLF
DNC DNC DNC DNC DNC (PCINT5/RESET/ADC0/dW) PB5 (PCINT3/CLKI/ADC3) PB3 DNC DNC (PCINT4/ADC2) PB4 1 2 3 4 5 20 19 18 17 16 15 14 13 12 11

NOTE: Bottom pad should be soldered to ground. DNC: Do Not Connect

10-QFN/MLF
(PCINT5/RESET/ADC0/dW) PB5 (PCINT3/CLKI/ADC3) PB3 DNC (PCINT4/ADC2) PB4 GND 1 2 3 4 5 10 9 8 7 6 VCC PB2 (SCK/ADC1/T0/PCINT2) DNC PB1 (MISO/AIN1/OC0B/INT0/PCINT1) PB0(MOSI/AIN0/OC0A/PCINT0)

NOTE: Bottom pad should be soldered to ground. DNC: Do Not Connect

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ATtiny13
2535J–AVR–08/10

DNC DNC GND DNC DNC

6 7 8 9 10

VCC PB2 (SCK/ADC1/T0/PCINT2) DNC PB1 (MISO/AIN1/OC0B/INT0/PCINT1) PB0 (MOSI/AIN0/OC0A/PCINT0)

ATtiny13
1.1
1.1.1

Pin Descriptions
VCC Digital supply voltage.

1.1.2

GND Ground.

1.1.3

Port B (PB5:PB0) Port B is a 6-bitbi-directional I/O port with internal pull-up resistors (selected for each bit). The Port B output buffers have symmetrical drive characteristics with both high sink and source capability. As inputs, Port B pins that are externally pulled low will source current if the pull-up resistors are activated. The Port B pins are tri-stated when a reset condition becomes active, even if the clock is notrunning. Port B also serves the functions of various special features of the ATtiny13 as listed on page 54.

1.1.4

RESET Reset input. A low level on this pin for longer than the minimum pulse length will generate a reset, even if the clock is not running. The minimum pulse length is given in Table 18-1 on page 115. Shorter pulses are not guaranteed to generate a reset. The reset pin can also beused as a (weak) I/O pin.

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2535J–AVR–08/10

2. Overview
The ATtiny13 is a low-power CMOS 8-bit microcontroller based on the AVR enhanced RISC architecture. By executing powerful instructions in a single clock cycle, the ATtiny13 achieves throughputs approaching 1 MIPS per MHz allowing the system designer to optimize power consumption versus processing speed.

2.1

Block Diagram...