Circuito integrado

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HD74LS283
4-bit Binary Full Adder
REJ03D0476–0300 Rev.3.00 Jul.15.2005 The HD74LS283 adder is electrically and functionally identical to the HD74LS83A, respectively; only the arrangement of the terminals has been changed. This improved full adder performs the addition of two 4-bit binary words. The sum (Σ) outputs are provided for each bit and the resultant carry (C4) is obtained from thefourth bits generating the carry term in then nanoseconds. The adder logic, including the carry, is implemented in its true form. End around carry can be accomplished without the need for logic or level inversion.

Features
• Ordering Information
Part Name HD74LS283P HD74LS283FPEL Package Type DILP-16 pin SOP-16 pin (JEITA) Package Code (Previous Code) PRDP0016AE-B (DP-16FV) Package Abbreviation PTaping Abbreviation (Quantity) — EL (2,000 pcs/reel)

PRSP0016DH-B FP (FP-16DAV) Note: Please consult the sales office for the above package availability.

Pin Arrangement

Σ2 B2 A2 Σ1 A1 B1 C0 GND

1 Σ2 2 3 4 5 6 7 8 B2 A2 Σ1 A1 B1 C0 C4 B3 A3 Σ3 A4 B4 Σ4

16 15 14 13 12 11 10 9

VCC B3 A3 Σ3 A4 B4 Σ4 C4

(Top view)

Rev.3.00, Jul.15.2005, page 1 of 7

HD74LS283

FunctionTable
Inputs A1 A3 L H L H L H L H L H L H L H L L H H L L H H L L H H L L B1 B3 L L L L H H H H L L L L H H A2 A4 L L L L L L L L H H H H H H B2 B4 L H H L L H H L L H H L L H When C0 = L Σ1 Σ3 L L L H H H H L H H H L L L Σ2 Outputs When C0 = H When C2 = L C2 Σ1 Σ2 Σ4 C4 Σ3 L H L L L L L H L H L L L L H H L H L L L L H H H H H L

L H H H H L L L H L L L L H

When C2 = H C2 Σ4 C4 L L L L L H H HL H H H H H

L H H H H L H L H H H H H H L H H H H H H; high level, L; low level Note: Input conditions at A1, B1, A2, B2, and C0are use to determine outputs Σ1 and Σ2 and the value of the internal carry C2. The values at C2, A3, B3, A4, and B4 are then used to determine outputs Σ3, Σ4, and C4.

Rev.3.00, Jul.15.2005, page 2 of 7

HD74LS283

Block Diagram

C4

B4 A4 Σ4

B3 A3 Σ3B2 A2 Σ2

B1 A1 C0 Σ1

Absolute Maximum Ratings
Item Supply voltage Input voltage Power dissipation Storage temperature Symbol VCC VIN PT Tstg Ratings 7 7 400 –65 to +150 Unit V V mW °C

Note: Voltage value, unless otherwise noted, are with respect to network ground terminal.

Recommended Operating Conditions
Item Supply voltage Output current Operating temperature Symbol VCC IOH IOLTopr Min 4.75 — — –20 Typ 5.00 — — 25 Max 5.25 –400 8 75 Unit V µA mA °C

Rev.3.00, Jul.15.2005, page 3 of 7

HD74LS283

Electrical Characteristics
(Ta = –20 to +75 °C)
Item Input voltage Symbol VIH VIL VOH Output voltage VOL except C0 C0 except C0 C0 except C0 IIH IIL II IOS min. 2.0 — 2.7 — — — — — — — — –20 — — — — typ.* — — — — — — — — — — — — 22 19 19 — max. — 0.8 — 0.4 0.5 40 20 –0.8–0.4 0.2 0.1 –100 39 34 34 –1.5 Unit V V V V µA mA mA mA Condition

VCC = 4.75 V, VIH = 2 V, VIL = 0.8 V, IOH = –400 µA IOL = 4 mA VCC = 4.75 V, VIH = 2 V, IOL = 8 mA VIL = 0.8 V VCC = 5.25 V, VI = 2.7 V VCC = 5.25 V, VI = 0.4 V VCC = 5.25 V, VI = 7 V VCC = 5.25 V All inputs grounded All B low other inputs at 4.5V

Input current

C0 Short-circuit output current

Supply current

ICC

mAVCC = 5.25 V

Input clamp voltage Note: * VCC = 5 V, Ta = 25°C

VIK

V

All inputs at 4.5V VCC = 4.75 V, IIN = –18 mA

Switching Characteristics
(VCC = 5 V, Ta = 25°C)
Item Symbol tPLH tPHL tPLH tPHL tPLH tPHL tPLH tPHL Inputs C0 Ai, Bi C0 Ai, Bi Outputs Σi Σi C4 C4 min. — — — — — — — — typ. 16 15 15 15 11 11 11 12 max. 24 24 24 24 17 22 17 17 Unit ns ns ns ns ns ns ns ns ConditionPropagation delay time

CL = 15 pF, RL = 2 kΩ

Rev.3.00, Jul.15.2005, page 4 of 7

HD74LS283

Testing Method
Test Circuit
VCC 4.5V RL C4 A4 Input B4 Output Σ4 Output Σ3 Output Σ2 Output Σ1 Same as Load Circuit 1. Same as Load Circuit 1. Same as Load Circuit 1. Same as Load Circuit 1. A3 B3 A2 B2 A1 B1 C0 CL Output

Load circuit 1

P.G. Zout = 50Ω

Notes:

1. CL includes...
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