Datat
L293DD
®
PUSH-PULL FOUR CHANNEL DRIVER WITH DIODES
600mA OUTPUT CURRENT CAPABILITY
PER CHANNEL
1.2A PEAK OUTPUT CURRENT (non repetitive) PER CHANNEL
ENABLE FACILITY
OVERTEMPERATURE PROTECTION
LOGICAL "0" INPUT VOLTAGE UP TO 1.5 V
(HIGH NOISE IMMUNITY)
INTERNAL CLAMP DIODES
DESCRIPTION
The Device is a monolithic integrated high voltage, high current four channel driverdesigned to
accept standard DTL or TTL logic levels and drive
inductive loads (such as relays solenoides, DC
and stepping motors) and switching power transistors.
To simplify use as two bridges each pair of channels is equipped with an enable input. A separate
supply input is provided for the logic, allowing operation at a lower voltage and internal clamp diodes are included.
This device issuitable for use in switching applications at frequencies up to 5 kHz.
SO(12+4+4)
Powerdip (12+2+2)
ORDERING NUMBERS:
L293DD
L293D
The L293D is assembled in a 16 lead plastic
packaage which has 4 center pins connected together and used for heatsinking
The L293DD is assembled in a 20 lead surface
mount which has 8 center pins connected together and used for heatsinking.
BLOCKDIAGRAM
July 2003
1/7
L293D - L293DD
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
Value
Unit
VS
Supply Voltage
36
V
VSS
Vi
Ven
Logic Supply Voltage
Input Voltage
36
7
V
V
Enable Voltage
Peak Output Current (100 µs non repetitive)
7
1.2
V
A
Io
Ptot
Tstg, Tj
Total Power Dissipation at Tpins = 90 °C
4
W
– 40 to 150
Storage andJunction Temperature
°C
PIN CONNECTIONS (Top view)
Powerdip(12+2+2)
SO(12+4+4)
THERMAL DATA
Symbol
Decription
Rth j-pins
Rth j-amb
Thermal Resistance Junction-pins
Thermal Resistance junction-ambient
Rth j-case
Thermal Resistance Junction-case
(*) With 6sq. cm on board heatsink.
2/7
DIP
SO
Unit
max.
max.
–
80
14
50 (*)
°C/W
°C/Wmax.
14
–
L293D - L293DD
ELECTRICAL CHARACTERISTICS (for each channel, VS = 24 V, VSS = 5 V, Tamb = 25 °C, unless
otherwise specified)
Symbol
VS
VSS
IS
ISS
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
Supply Voltage (pin 10)
VSS
36
V
Logic Supply Voltage (pin 20)
Total Quiescent Supply Current
(pin 10)
4.5
V
mA
Total Quiescent LogicSupply
Current (pin 20)
Vi = L ; IO = 0 ; Ven = H
2
36
6
Vi = H ; IO = 0 ; Ven = H
16
24
mA
44
4
60
mA
mA
Ven = L
Vi = L ; IO = 0 ; Ven = H
VIL
Input High Voltage (pin 2, 9,
12, 19)
16
22
mA
16
– 0.3
24
1.5
mA
V
2.3
2.3
VSS
7
V
V
– 10
µA
100
µA
– 0.3
1.5
V
2.3
2.3
VSS
7
V
V
– 100
µA± 10
µA
Input Low Voltage (pin 2, 9, 12,
19)
VIH
Vi = H ; IO = 0 ; Ven = H
Ven = L
VSS ≤ 7 V
VSS > 7 V
IIL
Low Voltage Input Current (pin
2, 9, 12, 19)
VIL = 1.5 V
IIH
High Voltage Input Current (pin
2, 9, 12, 19)
2.3 V ≤ VIH ≤ VSS – 0.6 V
30
Ven L
Enable Low Voltage
(pin 1, 11)
Ven H
Enable High Voltage
(pin 1, 11)
VSS ≤ 7 V
VSS > 7 VIen L
Low Voltage Enable Current
(pin 1, 11)
Ven L = 1.5 V
Ien H
High Voltage Enable Current
(pin 1, 11)
2.3 V ≤ Ven H ≤ VSS – 0.6 V
VCE(sat)H
Source Output Saturation
Voltage (pins 3, 8, 13, 18)
IO = – 0.6 A
1.4
1.8
V
VCE(sat)L
Sink Output Saturation Voltage
(pins 3, 8, 13, 18)
IO = + 0.6 A
1.2
1.8
V
VF
Clamp Diode Forward VoltageIO = 600nA
1.3
V
tr
Rise Time (*)
0.1 to 0.9 VO
250
ns
tf
Fall Time (*)
Turn-on Delay (*)
Turn-off Delay (*)
0.9 to 0.1 VO
0.5 Vi to 0.5 VO
0.5 Vi to 0.5 VO
250
750
200
ns
ns
ns
ton
toff
– 30
(*) See fig. 1.
3/7
L293D - L293DD
Figure 1: Switching Times
TRUTH TABLE (one channel)
Input
Enable (*)
Output
H
L
H
L
H
H...
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