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74HC595; 74HCT595
8-bit serial-in, serial or parallel-out shift register with output latches; 3-state
Rev. 6 — 12 December 2011 Product data sheet

1. General description
The 74HC595; 74HCT595 are high-speed Si-gate CMOS devices and are pin compatible with Low-power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard No. 7A. The 74HC595; 74HCT595 are 8-stage serialshift registers with a storage register and 3-state outputs. The registers have separate clocks. Data is shifted on the positive-going transitions of the shift register clock input (SHCP). The data in each register is transferred to the storage register on a positive-going transition of the storage register clock input (STCP). If both clocks are connected together, the shift register will always beone clock pulse ahead of the storage register. The shift register has a serial input (DS) and a serial standard output (Q7S) for cascading. It is also provided with asynchronous reset (active LOW) for all 8 shift register stages. The storage register has 8 parallel 3-state bus driver outputs. Data in the storage register appears at the output whenever the output enable input (OE) is LOW.

2.Features and benefits
      8-bit serial input 8-bit serial or parallel output Storage register with 3-state outputs Shift register with direct clear 100 MHz (typical) shift out frequency ESD protection:  HBM JESD22-A114F exceeds 2000 V  MM JESD22-A115-A exceeds 200 V  Multiple package options  Specified from 40 C to +85 C and from 40 C to +125 C

3. Applications
Serial-to-parallel data conversion  Remote control holding register

NXP Semiconductors

74HC595; 74HCT595
8-bit serial-in, serial or parallel-out shift register with output latches; 3-state

4. Ordering information
Table 1. Ordering information Package Temperature range 74HC595N 74HCT595N 74HC595D 74HCT595D 74HC595DB 74HCT595DB 74HC595PW 74HCT595PW 74HC595BQ 74HCT595BQ 40 C to +125 C DHVQFN16 40 Cto +125 C TSSOP16 40 C to +125 C SSOP16 40 C to +125 C SO16 plastic small outline package; 16 leads; body width 3.9 mm plastic shrink small outline package; 16 leads; body width 5.3 mm plastic thin shrink small outline package; 16 leads; body width 4.4 mm plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 16 terminals; body 2.5  3.5  0.85 mm SOT109-1SOT338-1 SOT403-1 SOT763-1 40 C to +125 C Name DIP16 Description plastic dual in-line package; 16 leads (300 mil) Version SOT38-4 Type number

5. Functional diagram

14 DS 11 SHCP 10 MR 8-STAGE SHIFT REGISTER Q7S 12 STCP 9

8-BIT STORAGE REGISTER

13 OE

3-STATE OUTPUTS Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7 15 1 2 3 4 5 6 7
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Fig 1.

Functional diagram

74HC_HCT595

All informationprovided in this document is subject to legal disclaimers.

© NXP B.V. 2011. All rights reserved.

Product data sheet

Rev. 6 — 12 December 2011

2 of 24

NXP Semiconductors

74HC595; 74HCT595
8-bit serial-in, serial or parallel-out shift register with output latches; 3-state

13 12 11 12 10 9 15 1 2 3 4 5 6 7 14 1D 11 R C1/ SRG8 SHCP STCP Q7S Q0 Q1 Q2 14 DS Q3 Q4 Q5 Q6 Q7 MR 10 OE13
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EN3 C2

2D

3

15 1 2 3 4 5 6 7 9

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Fig 2.

Logic symbol

Fig 3.

IEC logic symbol

STAGE 0 DS D FF0 CP SHCP R Q D

STAGES 1 TO 6 Q

STAGE 7 D FF7 CP R Q Q7S

MR

D

Q

D

Q

LATCH CP STCP OE

LATCH CP

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Q0

Q1 Q2 Q3 Q4 Q5 Q6

Q7

Fig 4.

Logic diagram

74HC_HCT595

All information provided in this document is subjectto legal disclaimers.

© NXP B.V. 2011. All rights reserved.

Product data sheet

Rev. 6 — 12 December 2011

3 of 24

NXP Semiconductors

74HC595; 74HCT595
8-bit serial-in, serial or parallel-out shift register with output latches; 3-state

6. Pinning information
6.1 Pinning
74HC595 74HCT595
Q1 Q2 Q3 Q4 Q5 Q6 Q7 GND 1 2 3 4 5 6 7 8
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16 VCC 15 Q0 14 DS 13 OE 12...