Minilink
Technical Description
MINI-LINK
™
MINI-LINK TN ETSI
Technical Description
Copyright
© Ericsson AB 2004 – All Rights Reserved
Disclaimer
The contents of this document are subject to revision without notice due to
continued progress in methodology, design, and manufacturing.
Ericsson shall have no liability for any error or damage of any kind resultingfrom
the use of this document.
1/1555-CSH 109 32/1 Rev A 2004-06-08
Contents
1
1.1
1.2
1.2.1
1.2.2
1.2.3
1.3
1.4
Introduction............................................................................................ 1
General.................................................................................................... 1
SystemOverview..................................................................................... 3
Introduction.............................................................................................. 3
Indoor Part............................................................................................... 5
Outdoor Part ............................................................................................ 6
RelatedDocuments ................................................................................. 7
Revision Information ................................................................................ 7
2
2.1
2.1.1
2.1.2
2.1.3
2.1.4
2.1.5
2.2
2.2.1
2.2.2
2.2.3
2.3
2.3.1
2.3.2
2.4
2.4.1
2.4.2
2.5
2.5.1
2.5.2
2.5.3
2.6
2.6.1
2.7
2.7.1
2.7.2
2.7.3
2.8
2.8.1
2.8.2
2.8.32.9
2.10
Basic Node ............................................................................................. 9
System Architecture ................................................................................ 9
TDM Bus.................................................................................................. 9
PCI Bus................................................................................................. 10
SPI Bus.................................................................................................. 10
Power Bus ............................................................................................. 10
BPI Bus.................................................................................................. 10
Access ModuleMagazine (AMM) .......................................................... 11
AMM 2p ................................................................................................. 11
AMM 6p ................................................................................................. 13
AMM 20p ............................................................................................... 15Node Processor Unit (NPU) .................................................................. 19
Overview................................................................................................ 19
Functional Blocks .................................................................................. 20
E1 Interfaces......................................................................................... 23
NPU ....................................................................................................... 23
LTU........................................................................................................ 23
STM-1 Interface..................................................................................... 26Overview................................................................................................ 26
LTU 155................................................................................................. 27
Synchronization ..................................................................................... 30
Traffic Routing ....................................................................................... 31
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