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Publicado: 25 de diciembre de 2012
PRECISION TIMERS
SLFS022E − SEPTEMBER 1973 − REVISED MARCH 2004
Timing From Microseconds to Hours
Astable or Monostable Operation
Adjustable Duty Cycle
TTL-CompatibleOutput Can Sink or Source
Up To 200 mA
description/ordering information
These devices are precision timing circuits
capable of producing accurate time delays or
oscillation. In the time-delay ormonostable mode
of operation, the timed interval is controlled by a
single external resistor and capacitor network. In
the astable mode of operation, the frequency and
duty cycle can be controlledindependently with
two external resistors and a single external
capacitor.
NE555 . . . D, P, PS, OR PW PACKAGE
SA555 . . . D OR P PACKAGE
SE555 . . . D, JG, OR P PACKAGE
(TOP VIEW)
GND
TRIGOUT
RESET
1
7
3
6
4
VCC
DISCH
THRES
CONT
8
2
5
SE555 . . . FK PACKAGE
(TOP VIEW)
NC
GND
NC
VCC
NC
D
D
D
D
NC
TRIG
NC
OUT
NC
4
3 2 1 20 1918
5
17
6
16
NC
DISCH
NC
THRES
NC
NC
RESET
NC
CONT
NC
15
7
The threshold and trigger levels normally are
14
8
two-thirds and one-third, respectively, of VCC.
9 1011 12 13
These levels can be altered by use of the
control-voltage terminal. When the trigger input
falls below the trigger level, the flip-flop is set and
the output goes high. If the triggerinput is above
NC − No internal connection
the trigger level and the threshold input is above
the threshold level, the flip-flop is reset and
the output is low. The reset (RESET) input can overrideall other inputs and can be used to initiate a new timing
cycle. When RESET goes low, the flip-flop is reset and the output goes low. When the output is low, a
low-impedance path is provided betweendischarge (DISCH) and ground.
The output circuit is capable of sinking or sourcing current up to 200 mA. Operation is specified for supplies of
5 V to 15 V. With a 5-V supply, output levels are...
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