William Mendoza

Páginas: 17 (4126 palabras) Publicado: 9 de mayo de 2012
Features
• AVR® - High Performance and Low Power RISC Architecture • 118 Powerful Instructions - Most Single Clock Cycle Execution • 4K bytes of In-System Reprogrammable Flash • • • • • • • • • • • • • • • • •
– SPI Serial Interface for Program Downloading – Endurance: 1,000 Write/Erase Cycles 256 bytes EEPROM – Endurance: 100,000 Write/Erase Cycles 256 bytes Internal SRAM 32 x 8 GeneralPurpose Working Registers 32 Programmable I/O Lines Programmable Serial UART SPI Serial Interface VCC: 2.7 - 6.0V Fully Static Operation – 0 - 8 MHz, 4.0 - 6.0V – 0 - 4 MHz, 2.7 - 4.0V Up to 8 MIPS Throughput at 8 MHz One 8-Bit Timer/Counter with Separate Prescaler One 16-Bit Timer/Counter with Separate Prescaler and Compare and Capture Modes Dual PWM External and Internal Interrupt Sources ProgrammableWatchdog Timer with On-Chip Oscillator On-Chip Analog Comparator Low Power Idle and Power Down Modes Programming Lock for Software Security

8-Bit Microcontroller with 4K bytes In-System Programmable Flash AT90S4414 Preliminary

Description
The AT90S4414 is a low-power CMOS 8-bit microcontroller based on the AVR enhanced RISC architecture. By executing powerful instructions in a single clockcycle, the AT90S4414 achieves throughputs approaching 1 MIPS per MHz allowing the system designer to optimize power consumption versus processing speed. The AVR core is based on an enhanced RISC architecture that combines a rich instruction set with 32 general purpose working registers. All the 32 registers are directly connected to the Arithmetic Logic Unit (ALU), allowing two independentregisters to be accessed in one single instruction executed in one clock cycle. The resulting architecture is more code efficient while achieving throughputs up to ten times faster than conventional CISC microcontrollers. (continued)

Pin Configurations

Rev. 0840DS–07/98

Note: This is a summary document. For the complete 76 page datasheet, please visit our web site at www.atmel.com or e1 mail atliterature@atmel.com and request literature #0840D.

Block Diagram
Figure 1. The AT90S4414 Block Diagram

The AT90S4414 provides the following features: 4K bytes of In-System Programmable Flash, 256 bytes EEPROM, 256 bytes SRAM, 32 general purpose I/O lines, 32 general purpose working registers, flexible timer/counters with compare modes, internal and external interrupts, a programmableserial UART, programmable Watchdog Timer with internal oscillator, an SPI serial port and two software selectable power saving modes. The Idle Mode stops the CPU while allowing the SRAM, timer/counters, SPI port and interrupt system to continue functioning. The power down mode saves the register contents but freezes the oscillator, disabling all other chip functions until the next interrupt orhardware reset.

The device is manufactured using Atmel’s high density non-volatile memory technology. The on-chip In-System Programmable Flash allows the program memory to be reprogrammed in-system through an SPI serial interface or by a conventional nonvolatile memory programmer. By combining an enhanced RISC 8-bit CPU with In-System Programmable Flash on a monolithic chip, the Atmel AT90S4414 is apowerful microcontroller that provides a highly flexible and cost effective solution to many embedded control applications. The AT90S4414 AVR is supported with a full suite of program and system development tools including: C compilers, macro assemblers, program debugger/simulators, incircuit emulators, and evaluation kits.

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AT90S4414

AT90S4414
Pin Descriptions
VCC Supply voltage GNDGround Port A (PA7..PA0) Port A is an 8-bit bidirectional I/O port. Port pins can provide internal pull-up resistors (selected for each bit). The Port A output buffers can sink 20mA and can drive LED displays directly. When pins PA0 to PA7 are used as inputs and are externally pulled low, they will source current if the internal pull-up resistors are activated. Port A serves as Multiplexed...
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