Vscpu

Instructional tools for designing and analysing a very simple CPU
John D. Carpinelli and Titu Zaman Department of Electrical and Computer Engineering, New Jersey Institute of Technology, Newark, USA E-mail: carpinelli@njit.edu
Abstract The Very Simple CPU is an instructional aid developed to introduce students to the process of designing a microprocessor. It allows students to focus on designprinciples without becoming overwhelmed with complex design specifications. This paper describes the CPU and two tools used to teach students about CPU design, VHDL implementations and a Java-based simulator. Keywords computer architecture; simulation; VHDL

Computer architecture is a core topic of study for undergraduate students in computer engineering1 and computer science2 curricula. Amongother things, this topic encompasses the design of processors, including data path and control. This topic is often difficult for students, as it incorporates open-ended design and the evaluation of design trade-offs to which students may not have been exposed previously. It often is positioned in undergraduate curricula immediately after a course in digital logic design, which presents a large gapfor students to bridge. To address this topic and improve student learning, we have developed a multifaceted strategy centred about the design and implementation of a very simple CPU. First students are exposed to the instruction set architecture for an instructional aid named the Very Simple CPU. Although not practical for real-world use, the CPU incorporates many of the features found inmicroprocessors but excludes almost all complex features that distract students from learning the core concepts of CPU design. With the foundation provided by this design, students would be expected to follow it up by studying and designing more complex CPUs. Two strategies are employed to help students understand the design of the Very Simple CPU. First, VHDL implementations of the CPU at both highand low levels of abstraction are presented. Students can see how the CPU is constructed, how it performs the functions necessary to fetch, decode, and execute instructions, and can compare the two design methodologies. The VHDL code uses only simple constructs and does not require extensive knowledge of VHDL semantics on the part of the student. This approach works well for students with strongbackgrounds in digital design. To assist students with a more visual learning style, a Java-based simulator has been developed. This simulator emulates the internal organization of the CPU, animating the flow of data within the CPU as it processes instructions. Students who may have difficulty visualizing how the processor works from just the VHDL code can obtain a more intuitive understanding ofdata flow and control within the CPU from this simulator.
International Journal of Electrical Engineering Education 43/3

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J. D. Carpinelli and T. Zaman

The rest of this paper is organized as follows. First, the instruction set architecture of the Very Simple CPU is presented, along with a basic description of its internal organization. Then the VHDL design files are described, alongwith the Very Simple CPU simulator. Other simulators developed for educational purposes are described briefly, and concluding remarks are presented. The Very Simple CPU The Very Simple CPU was created as an instructional aid for students studying computer architecture, typically at the third-year undergraduate level. This CPU is extremely limited by design, incorporating only four instructions andone useraccessible register. With this CPU, students can learn the fundamentals of CPU design, such as how a CPU fetches, decodes, and executes instructions, without being burdened with too many design details. Equipped with these fundamental design principles, students could then advance to designing more complex CPUs. The complete design of this CPU is presented in Ref. 3. The instruction set...