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DM74LS47 BCD to 7-Segment Decoder/Driver with Open-Collector Outputs

October 1988 Revised March 2000

DM74LS47 BCD to 7-Segment Decoder/Driver with Open-Collector Outputs
General Description
The DM74LS47 accepts four lines of BCD (8421) input data, generates their complements internally and decodes the data with seven AND/OR gates having open-collector outputs to drive indicator segmentsdirectly. Each segment output is guaranteed to sink 24 mA in the ON (LOW) state and withstand 15V in the OFF (HIGH) state with a maximum leakage current of 250 µA. Auxiliary inputs provided blanking, lamp test and cascadable zero-suppression functions.

Features
s Open-collector outputs s Drive indicator segments directly s Cascadable zero-suppression capability s Lamp test input

OrderingCode:
Order Number DM74LS47M DM74LS47N Package Number M16A N16E Package Description 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide

Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

Logic Symbol

Connection Diagram

VCC = Pin 16 GND = Pin8

Pin Descriptions
Pin Names A0–A3 RBI LT BI/RBO a –g BCD Inputs Ripple Blanking Input (Active LOW) Lamp Test Input (Active LOW) Blanking Input (Active LOW) or Ripple Blanking Output (Active LOW) Segment Outputs (Active LOW) (Note 1)
Note 1: OC—Open Collector

Description

© 2000 Fairchild Semiconductor Corporation

DS009817

www.fairchildsemi.com

DM74LS47

Truth Table
Decimalor Function 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 BI RBI LT LT H H H H H H H H H H H H H H H H X H L RBI H X X X X X X X X X X X X X X X X L X A3 L L L L L L L L H H H H H H H H X L X Inputs A2 L L L L H H H H L L L L H H H H X L X A1 L L H H L L H H L L H H L L H H X L X A0 L H L H L H L H L H L H L H L H X L X BI/RBO H H H H H H H H H H H H H H H H L L H a L H L L H L H L L L H H H L H H H H Lb L L L L L H H L L L H H L H H H H H L c L L H L L L L L L L H L H H H H H H L Outputs d L H L L H L L H L H L L H L L H H H L e L H L H H H L H L H L H H H L H H H L f L H H H L L L H L L H H L L L H H H L g H H L L L L L H L L L L L L L H H H L (Note 3) (Note 4) (Note 5) (Note 2) (Note 2) Note

Note 2: BI/RBO is wire-AND logic serving as blanking input (BI) and/or ripple-blanking output(RBO). The blanking out (BI) must be open or held at a HIGH level when output functions 0 through 15 are desired, and ripple-blanking input (RBI) must be open or at a HIGH level if blanking or a decimal 0 is not desired. X = input may be HIGH or LOW. Note 3: When a LOW level is applied to the blanking input (forced condition) all segment outputs go to a HIGH level regardless of the state of any otherinput condition. Note 4: When ripple-blanking input (RBI) and inputs A0, A1, A2 and A3 are LOW level, with the lamp test input at HIGH level, all segment outputs go to a HIGH level and the ripple-blanking output (RBO) goes to a LOW level (response condition). Note 5: When the blanking input/ripple-blanking output (BI/RBO) is OPEN or held at a HIGH level, and a LOW level is applied to lamp testinput, all segment outputs go to a LOW level.

Functional Description
The DM74LS47 decodes the input data in the pattern indicated in the Truth Table and the segment identification illustration. If the input data is decimal zero, a LOW signal applied to the RBI blanks the display and causes a multidigit display. For example, by grounding the RBI of the highest order decoder and connecting itsBI/RBO to RBI of the next lowest order decoder, etc., leading zeros will be suppressed. Similarly, by grounding RBI of the lowest order decoder and connecting its BI/RBO to RBI of the next highest order decoder, etc., trailing zeros will be suppressed. Leading and trailing zeros can be suppressed simultaneously by using external gates, i.e.: by driving RBI of a intermediate decoder from an OR gate...