No Se

EXAMEN RESUELTO EN MAX+PLUS II
Tema2
LIBRARY ieee;
USE ieee.std_logic_1164.ALL;

ENTITY tema2 IS
PORT(
puerta,presencia,panico,stop : IN BIT;sirena, GSM : OUT BIT);

END tema2;

ARCHITECTURE examen OF tema2 IS
BEGIN

sirena <= '1' when(((puerta or presencia) and not stop)='1') else '0';GSM <= '1' when ((panico and not stop)='1') else '0';

END examen;

Tema 3

LIBRARY ieee;
USE ieee.std_logic_1164.ALL;
USEieee.std_logic_unsigned.ALL;

ENTITY tema3 IS
PORT(
C,D,B : IN STD_LOGIC;
F : OUT STD_LOGIC);

END tema3;

ARCHITECTURE solucion OF tema3 IS
BEGIN

F <= (NOT C or(NOT D AND B));

END solucion;

Tema 4
Función 1

LIBRARY ieee;
USE ieee.std_logic_1164.ALL;
USE ieee.std_logic_unsigned.ALL;

ENTITY tema4_1 ISPORT(
A,B,C : IN STD_LOGIC;
F: OUT STD_LOGIC);

END tema4_1;

ARCHITECTURE sol OF tema4_1 IS
BEGIN

F<= (A or B or (not C));

END sol;Función 2

LIBRARY ieee;
USE ieee.std_logic_1164.ALL;
USE ieee.std_logic_unsigned.ALL;

ENTITY tema4_2 IS
PORT(
A,B,C,D : IN STD_LOGIC;
F: OUTSTD_LOGIC);

END tema4_2;

ARCHITECTURE sol OF tema4_2 IS
BEGIN

F<= ((not A and not B and C and D) or (B and not C and D) or (A and not D));
ENDsol;

Función 3

LIBRARY ieee;
USE ieee.std_logic_1164.ALL;
USE ieee.std_logic_unsigned.ALL;

ENTITY tema4_3 IS
PORT(
A,B,C,D : IN STD_LOGIC;
F:OUT STD_LOGIC);

END tema4_3;

ARCHITECTURE sol OF tema4_3 IS
BEGIN

F<= ((not A and not D) or (A and B and D) or (A and not B and C));

END sol;