Programador

SIMATIC S7-1200 Update to the S7-1200 System Manual, edition 04/2012
Product Information
In spite of efforts to ensure the accuracy and clarity in the product documentation, some of the pages in the S7-1200 Programmable Controller System Manual contain information that has been identified as being incomplete, incorrect or misleading.

New modules for the S7-1200
New modules expand the powerof the S7-1200 CPU and provide the flexibility to meet your automation needs: ● New and improved CPUs: – New CPU 1215C DC/DC/DC, CPU 1215C DC/DC/Relay, and CPU 1215C AC/DC/Relay offer 100 Kbytes of work memory, dual Ethernet, and analog outputs. – New and improved CPU 1211Cs, CPU 1212Cs, and CPU 1214Cs have faster processing time, the possibility of 4 PTOs (the CPU 1211C requires a signal board),increased retentive memory (10 Kbytes), and increased time-of-day hold up time (20 days). ● New I/O signal module: SM 1231 AI 4 x 16-bit provides higher sample rate and increased number of bits. ● New battery board (BB 1297) offers long term backup of the real-time clock. The BB 1297 is pluggable in the signal board slot of the S7-1200 CPU (firmware V3.0 and later versions). Prerequisites To usethe new modules you must use STEP 7 V11 SP2 Update 3 or later (Basic or Professional) and you must download the hardware support package (HSP) for new modules from the STEP 7 Options > Support Packages menu command. Follow the instructions for adding modules to the hardware catalog for STEP 7 (TIA Portal) from the Siemens Service and Support Site (http://support.automation.siemens.com).

S7-1200behavior following a fatal error
When the S7-1200 CPU detects a fatal error, it enters a defective state and performs the following actions: 1. Turns on the error LED: When the CPU goes defective, it attempts to signal the condition by flashing the error LED. Note: The defective state of the CPU, however, might prevent the CPU from flashing the error LED. 2. Performs a warm restart, which removesthe user program, hardware configuration and resets all outputs to 0. Note A defective state is not a STOP state or non-fatal error state where the user program remains and restores outputs to their substitute values.

Securing access to the S7-1200 CPU
As described in the Chapter 11, Web Server, section 11.1 "Enabling the Web server" in the S7-1200 Programmable Controller System Manual, takecare to avoid unauthorized access to the CPU from the Web server interface. In addition to the security practices described in the topic "Enabling the Web server", also ensure that you isolate the CPU network behind a firewall.

© Siemens, All rights reserved Ⓟ 2012 A5E03929122-AB, 07/2012

1

Incorrect HSC configuration after CPU version change
The S7-1200 CPU V3.0 does not require ahigh-speed counter for correct PTO operation. However, previous firmware versions of the S7-1200 CPU (V1.0 or V2.x) do require an associated high-speed counter. It is possible to encounter compile errors when exchanging CPUs between V3.0 and V1.0 or V2.x. The following are specific scenarios that exhibit this behavior. Scenario: PTO and motion V1.0 or V2.x to V3.0 When you have an S7-1200 CPU V1.0 orV2.x with enabled PTOs and select to exchange this CPU with a CPU that supports V3.0, compile errors result from improperly configured high-speed counters due to differences in the operation of PTO. After the exchange, the resulting compile error appears as follows:

Workaround To eliminate the compile error, follow these steps: 1. Double-click on the error in the compile output listing. Theproperties of the high-speed counter are displayed:

2. Select the "Type of counting" field and select one of the available options ("Frequency" or "Count"). The entry is no longer red. 3. Next, select the "General" section of the properties, as shown below:

2

Update to the S7-1200 System Manual, edition 04/2012 A5E03929122-AB, 07/2012

4. Deselect the "Enable this high-speed counter"...