Reed solomon

Aalborg University
Institute of Electronic Systems
Applied Signal Processing and Implementation, 10th Semester

Title:

Analyzing and Implementing a Reed-Solomon Decoder for Forward Error Correction in ADSL
Project Period:
10th February 2007 – 5th June 2007

Abstract:
This report presents a rapid design strategy for an efficient implementation of a ReedSolomon (RS) decoder specified inADSL standard ITU G.992.1 onto the Xilinx Virtex II FPGA and TigerSHARC ADSP-TS201 DSP. ADSL is a home user-oriented modem technology that uses existing twisted-pair copper telephone lines to transport highbandwidth data, such as multimedia and video. The project goes through the given system (i.e., RS decoder) analysis, its modeling, simulation, selection of a particular RS decoder over anotherfor its further analysis and implementation onto the available types of architectures. Before the actual implementation step, it is necessary to determine which type of architecture (DSP or FPGA) is the most suitable for the execution of the selected RS decoder. For that, algorithm characterization is performed. The main idea of characterization is to extract relevant information from the givenalgorithm to guide the designer towards an efficient algorithm-architecture matching. To this effect, different performance metrics are efficiently used in the project to rapidly stress the proper architecture style for the given RS decoding algorithms.

Group:
ASPI, group 1040

Group Members:
Aleksandras Šaramentovas Paulius Ruzgys

Supervisors:
Rasmus Abildgren Yannick Le Moullec
Numberof reports printed: 5 Number of pages in report: 99 Number of pages in appendix: 20 Total number of pages: 133

Aalborg University • Fredrik Bajers Vej 7 • Aalborg 2007

Analyzing and Implementing a Reed-Solomon Decoder for Forward Error Correction in ADSL

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Analyzing and Implementing a Reed-Solomon Decoder for Forward Error Correction in ADSL

Preface
This master thesis was writtenby 1040 group of ASPI specialization at the Faculty of Engineering and Science, Institute of Electronic Systems, Department of Communication, Aalborg University, Denmark. The project was proposed by the project supervisors. The project report guides the reader through a rapid design strategy for an efficient implementation of a Reed-Solomon decoder specified in ADSL standard ITU G.992.1 onto theavailable architectures. The enclosed CD contains all source codes, which were used in this project work. 5th of June, 2007

Aleksandras Šaramentovas

Paulius Ruzgys

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Analyzing and Implementing a Reed-Solomon Decoder for Forward Error Correction in ADSL

List of Abbreviations
A/D ADSL AFI ALU ANSI ASIC AWGN BER BM BMR BPSK BTB CD CDFG CDMA CLB CLU CO CPLD CRC D/A DC DCM DFG DMA DMTDR DRAM DSL DSP DVB DVD EDAC EDIF EEPROM EPROM FDM FEC FIFO FPGA GCD GF GPP GRM HCDFG Analog-to-Digital Asymmetric Digital Subscriber Line Automatic Function Inlining Arithmetic Logic Unit American National Standards Institute Application-Specific Integrated Circuit Additive White Gaussian Noise Bit Error Rate Berlekamp-Massey Bit Manipulation Rate Binary Phase-Shift Keying Branch Target BufferCompact Disk Control and Data Flow Graph Code Division Multiple Access Configurable Logic Block Communications Logic Unit Central Office Complex Programmable Logic Device Cyclic Redundancy Check Digital-to-Analog Direct Current Digital Clock Manager Data Flow Graph Direct Memory Access Discrete Multi-Tone Data Ratio Dynamic Random Access Memory Digital Subscriber Line Digital Signal ProcessorDigital Video Broadcasting Digital Versatile Disc Error Detection and Correction Electronic Data Interchange Format Electrically Erasable Programmable Read-Only Memory Erasable Programmable Read-Only Memory Frequency-Division Multiplexing Forward Error Correction First In, First Out Field-Programmable Gate Array Greatest Common Divisor Galois Fields General Purpose Processor General Routing Matrix...