Celula Procariota

M74HC4543
BCD TO 7 SEGMENT LATCH/DECODER/LCD DRIVER
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HIGH SPEED: tPD = 14ns (TYP.) at VCC = 6V LOW POWER DISSIPATION: ICC = 4µA(MAX.) at TA=25°C HIGH NOISE IMMUNITY: VNIH = V NIL = 28 % VCC (MIN.) SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 4mA (MIN) BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL WIDE OPERATING VOLTAGE RANGE: VCC (OPR) = 2V to 6V PIN AND FUNCTIONCOMPATIBLE WITH 74 SERIES 4543

DIP

SOP

TSSOP

ORDER CODES
PACKAGE DIP SOP TSSOP TUBE M74HC4543B1R M74HC4543M1R T&R M74HC4543RM13TR M74HC4543TTR

DESCRIPTION The M74HC4543 is an high speed CMOS BCD-TO-7 SEGMENT DECODER WITH LCD DRIVER fabricated with silicon gate C2MOS technology. This device consists of BCD-TO-7 segment decoder with a BCD input latch and a 7-segment driver for a liquidcrystal display (LCD). When any illegal BCD input signal is applied or input BI is held high, the display is blanked. When driving

LCDs, a common square wave signal should be applied not only to the PH input of this device but also to the electrically common backplane of the display. For other types of readouts, such as light-emitting diode (LED), some additional drivers, such as a transistorarray is required. All inputs are equipped with protection circuits against static discharge and transient excess voltage.

PIN CONNECTION AND IEC LOGIC SYMBOLS

July 2001

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M74HC4543
INPUT AND OUTPUT EQUIVALENT CIRCUIT PIN DESCRIPTION
PIN No 1 5, 3, 2, 4 6 7 9, 10, 11, 12, 13, 15, 14 8 16 SYMBOL LD A to D PH BI a to g GND VCC NAME AND FUNCTION Latch Disable Input (Active HIGH)Address (Data) Inputs Phase Input (Active HIGH) Blanking Input (Active HIGH) Segment Outputs Ground (0V) Positive Supply Voltage

TRUTH TABLE
INPUT LD X H H H H H H H H H H H H L ↑ BI H L L L L L L L L L L L L L ↑ PH L L L L L L L L L L L L L L H D X L L L L L L L L H H H H X C X L L L L H H H H L L L H X ↑ B X L L H H L L H H L L H X X A X L H L H L H L H L H X X X a L H L H H L H H H H H L L b LH H H H H L L H H H L L c L H H L H H H H H H H L L OUTPUT DISPLAY MODE d L H L H H L H H L H H L L ##### e L H L H L L L H L H L L L f L H L L L H H H L H H L L g L L L H H H H H L H H L L BLANK 0 1 2 3 4 5 6 7 8 9 BLANK BLANK ##### DISPLAY AS ABOVE

INVERSE OF ABOVE OUTPUT LEVEL

X : Don’t Care ↑ : Same as above combinations ### : Depends upon the BCD code previously applied when LD =’H’2/10

M74HC4543
LOGIC DIAGRAM

This logic diagram has not be used to estimate propagation delays

DISPLAY MODE

ABSOLUTE MAXIMUM RATINGS
Symbol VCC VI VO IIK IOK IO Supply Voltage DC Input Voltage DC Output Voltage DC Input Diode Current DC Output Diode Current DC Output Current Parameter Value -0.5 to +7 -0.5 to VCC + 0.5 -0.5 to VCC + 0.5 ± 20 ± 20 ± 25 ± 50 500(*) -65 to +150 300Unit V V V mA mA mA mA mW °C °C

ICC or IGND DC VCC or Ground Current PD Power Dissipation Tstg TL Storage Temperature Lead Temperature (10 sec)

Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied (*) 500mW at 65 °C; derate to 300mW by 10mW/°C from 65°C to 85°C

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M74HC4543
RECOMMENDEDOPERATING CONDITIONS
Symbol VCC VI VO Top tr, tf Supply Voltage Input Voltage Output Voltage Operating Temperature Input Rise and Fall Time VCC = 2.0V VCC = 4.5V VCC = 6.0V Parameter Value 2 to 6 0 to VCC 0 to VCC -55 to 125 0 to 1000 0 to 500 0 to 400 Unit V V V °C ns ns ns

DC SPECIFICATIONS
Test Condition Symbol Parameter VCC (V) 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 4.5 6.0 VOL Low Level OutputVoltage 2.0 4.5 6.0 4.5 6.0 II ICC Input Leakage Current Quiescent Supply Current 6.0 6.0 IO=-20 µA IO=-20 µA IO=-20 µA IO=-4.0 mA IO=-5.2 mA IO=20 µA IO=20 µA IO=20 µA IO=4.0 mA IO=5.2 mA VI = VCC or GND VI = VCC or GND TA = 25°C Min. 1.5 3.15 4.2 0.5 1.35 1.8 1.9 4.4 5.9 4.18 5.68 2.0 4.5 6.0 4.31 5.8 0.0 0.0 0.0 0.17 0.18 0.1 0.1 0.1 0.26 0.26 ± 0.1 4 1.9 4.4 5.9 4.13 5.63 0.1 0.1 0.1 0.37 0.37...