Investigacion

ITESM Campus Saltillo

Practice 1: Logic Gates & Branches
Objectives:  Use the Neuro-01 board to use ports as I/O’s.  Learn how to use “Logic” and “Bit & Bit test” mnemonics  Learn the importance of algorithms (Flow Chart’s)  Learn how to use Branches. Introduction: Ports as General I/O Since we will use again I/O ports, it is important that you be careful when connecting the ports.Remember:    There is a DDRx register (Data Direction Register) to configure the port as input or output (decide the direction) There is a PINx register. This is where the “read” value of the pins is stored. There is a PORTx register. This is where you “write” the values to the pins. (Also used for pull-up configuration, presented later)

And the configuration of an I/O Port can be seen in thefollowing image:

Also, remember that since we will use Digital Inputs with Pull-ups, it is important that you remember to invert (COM) the read port, since when there is “nothing” present at the port, the µc reads a “1”. (Recommended reading: ATmega32A Datasheet: Section 12.2 and 12.4) The Problem In this practice we will use Logic Mnemonics. Basically we will construct basic TTL gates: NOT, AND,OR and XOR, but we will do this programmatically in the µc. We want the following: The Port A will be the Inputs for the Logic Gates, being the two first bits the selector of the function the µc will perform:

M.C. Joel Castillo Gómez

ITESM Campus Saltillo Bit 1 Bit 0 Function 0 0 And 0 1 Or 1 0 Xor 1 1 Not So depending on the function (2 first switches in the dip-switch), the µc will dodifferent Logic Functions. For example, if externally in bit 0 and 1 of Port A, we have [OFF, OFF], we would have to perform the AND function, and then display the result in the Port B of the µc. The following image depicts this:
Port A as Inputs The first 2 bits = Function Selector 3 2 1 0

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Port B as Outputs

As you can see, the AND operation of bits 2 and 3 of Port A will be displayed in bit 0 of Port B and so on (PB0=PA2*PA3, PB2=PA4*PA5, PB4=PA6*PA7). This will also apply for functions Or and Xor, since these operations need 2 inputs to generate 1 output. The Not Function will be slightly different, as is shown in the following image:
Port A as Inputs The first 2 bits =Function Selector

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Port B as Outputs

In order to do this we will use the Mnemonics AND, OR, EOR, and COM for the logic gates. However, it is not a straightforward use of this mnemonics, since we need to manipulate the data in order to get this function properly working (the way we want). Let’s analyze the ANDfunction we want: First, the AND Mnemonic does something like this (known as bit-wise AND, since this performs and AND function bit by bit of 2 registers):

M.C. Joel Castillo Gómez

ITESM Campus Saltillo

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But we want something like this (This next image shows that we don’thave the inputs for the AND in 2 registers, that’s why we need to manipulate it):
7 6 5 4 3 2 1 0

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As you can see from the previous images, we need to do something, since we have all the information in one register (PINA). Basically, we need to separate this information into two registers, move them inside those registers (with the “bit & bit test”mnemonics), and clean them to do the task correctly. So, in the PINA register we have something like this:
7 6 5 4 3 2 1 0

And we need to “manipulate” this information to put it similar to this (in 2 different registers):
x x x 6 x 4 x 2

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Then, after manipulating the data, we can now use the AND mnemonic. This manipulation required 2 things: 1. Removing...