Thesis vhdl

ASIP design based on CORDIC algorithm using Xilinx and CoWare designer tools
A Thesis submitted in partial fulfillment of the requirements for the degree of Bachelor of Technology in Electronics and Communication Engineering by

Debabrat Mishra (107EC013)
under the guidance of

Prof. Kamala Kanta Mahapatra
Professor Department of Electronics and Communication, NIT Rourkela

DEPARTMENT OFELECTRONICS AND COMMUNICATION ENGINEERING NATIONAL INSTITUTE OF TECHNOLOGY ROURKELA 2011

ASIP design based on CORDIC algorithm using Xilinx and CoWare designer tools
A Thesis submitted in partial fulfillment of the requirements for the degree of

Bachelor of Technology in Electronics and Communication Engineering by

Debabrat Mishra (107EC013)
Department of Electronics andCommunication, NIT Rourkela

DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING NATIONAL INSTITUTE OF TECHNOLOGY ROURKELA 2011

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National Institute of Technology Rourkela CERTIFICATE

This is to certify that the thesis entitled, “ASIP design based on CORDIC algorithm using Xilinx and CoWare designer tools” submitted by Debabrat Mishra(107EC013) in partial fulfillment of the requirements forthe award of Bachelor of Technology Degree in Mechanical Engineering at National Institute of Technology, Rourkela is an authentic work carried out by him under my supervision and guidance.

To the best of my knowledge, the matter embodied in this thesis has not been submitted to any other University/Institute for the award of any Degree or Diploma.

Date:

Prof. K.K.Mahapatra Dept. ofElectronics and Comm. Engineering National Institute of Technology Rourkela-769008

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ACKNOWLEDGEMENT
I am extremely grateful to my guide Prof. K.K. Mahapatra for giving me the opportunity to work under him and for giving the topic to work on, which was both extremely interesting as well as challenging. His timely advice from time to time, however, made life much easier than it would have been.I am also grateful to Mr. Jagannath, Mr Anup Sarma and Mr Soubhagya Sutar without whose help, CoWare would have always remained an unsurmountable task. It was because of their help and tips that I was able to complete my thesis on time.

Last but not the least, I am thankful to my family, all my professors and friends without whose support this work would never have been possible.

Date:Debabrat Mishra (107EC013) Dept. of Electronics and Comm. Engineering National Institute of Technology Rourkela-769008

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ABSTRACT
Efficient generation of trigonometric as well as exponential functions without much increase in hardware complexity has always been a challenge, owing mainly to their importance and widespread use in Digital Signal Processing applications besides other areas.One such algorithm which is very much effective for the calculation of trigonometric, hyperbolic, exponential, linear and logarithmic functions is the CORDIC algorithm. The algorithm is very much hardware efficient because it omits the dependence on multipliers and is rather a combination of shift-add operations.

Application Specific Instruction-set Processors (ASIPs) are a type of processorthat serve as a compromise between General Purpose Processors (GPPs) and Single Purpose Processors (SPP). Their data-path can be optimized for a particular class of operations such as embedded control, Digital Signal Processing (DSP) applications etc. This project deals with the design of an ASIP based on the CORDIC algorithm using two very popular hardware designing tools, i.e , Xilinx IntegratedDevelopment Environment (IDE) from Xilinx corporations, Inc. and LISA 2.0 description language and processor designing environment from CoWare.

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CONTENTS
Certificate Acknowledgement Abstract List of figures List of tables iii iv v viii ix

Chapter 1 : Introduction 1.1 The CORDIC algorithm 1.2 Types of CORDIC algorithm 1.2.1 Sequential/iterative CORDIC 1.2.2 Parallel / cascaded CORDIC...