Esquema
L107 10u C121 C123 47u
L110 330R_100MHZ_3A 100n 10V 5V_DRX
FOR THE USE OF EXTERNAL CLOCK C124,C134 IS 1NF [30012581] X100 AND C123 IS REMOVED
3V3_DRX
R136 6k2 R138 6k2 R139 6k2 R140 6k2
S125
R135 1k2
27p C131
27p C132
16V
50V
50V
3V3_DRX
SHEET 8 SW_ENABLE1 CHROMA_SWAUDIO_MUX_SW
12V_IF
DIG_IF-
12V_IF
3V3_DRX
C120
C122
PTC RES S117 ACTIVE_ANT.
S112
S115
C101 C112 10V C109 100n 16V 47u S122 10n N.C. 16V R104 5k1 SHORT N.C. R108 5k1 5VL VCC_5V 50V 1n S123
100n 10V
16V 47u
1n 50V
DMP/DVD_SWITCH SHEET3 100n 10V
3V3_DRX
5V_TUNER
R100 3k3
N.C.
S104 5V_TUNER
VCC_3V3
10u
3V3_DRX
20.25Mhz
DRX_CLK10u
10u
L113
S127
L105
C129
C130
DRX POWER SUPPLY
SHEET3 VCTP PIN80
R112 47k
R125
47k
SGND 44
VREF 43
XTALOUT 42
XTALIN 41
DVSS_ADC 40
DVDD_ADC 39
PORT5 38
ADR_SEL 37
PORT4 36
PORT3 35
PORT2 34
R144 6k2
R145 6k2
AGC 1
C140
C100
10n 16V
VT 2
C124
100n 10V
S105 R113 47k R116 470R S106
R115 47R
R12247R L108
C115 S113 S114
C116 R124 470R R126 47k
1
L111
AVSS_ADC AVDD_ADC ANATSTX ANATSTY AVDD_FE8 AVSS_FE8 AVSS_FE401 IFINX AVDD_FE40
TUNER_AGC 33 PORT1 32 PORT0 31 DVSS_CAP 30 DVSS 29
C139 100n 10V C137 100n 10V SYNC_SW2 SHEET 3
AS 3
50V 39p
5V_DRX
10u
2 3
33n 16V
R105 5k1
C114
50V 1n
50V 1n
C119
R147 6k2
Q101 BF799
Q102 BF799
50V 1nC142 IDTV_YPbPr_SW
SCL 4
C102 R106 100R
4
C126 100n 10V
TU100 38.9MHz_TVTUN
5V_DRX
5 6 7
SDA 5
R107 50V 100R 39p 16V 1u
10V 100n
IC100 DRX3960A
50V 3u3
R114 100R
R121 100R
C133
R146 1R
10V 100n
5VL
L102
X100
R117 150R
R118 150R
C143
DVDD 28
L116
DVDD_CAP 27 SCL 26 SDA 25 RESETQ 24 21 AVDD_DAC
C136 R148 100R R149 100R100n 10V
L115
3V3_DRX
3V3_DRX
SCL_3V3_IC SDA_3V3_IC SHEET 3,5,6
C103
NC 6
C105 100n 10V S120 R101 3k3 C104 L101 BLM21A601S 5V_TUNER
R119 150R
C125 1 IN1 OUT1 4
8
L109 C127 600R_100MHZ_200mA 100n 10V
ACTIVE_ANT.
Z100 X6966M R120 150R 2 IN2 OUT2 5 GND 3
5V_DRX
9
33p 50V 33p
VS 7
12 AVDD_SYN
22 AVSS_DAC
PTC RES R103 4k7
10 IFINY 13AVSS_SYN 11 AVSS_FE402
C138
S116
3V3_DRX TEST_EN 23
R150 1k
14 SHIELD
NC/ADC 8
C106 C107 100n 16V 3u3 50V R102 4k7 R109 1k S103 VCC_33V
19 REF_SW
15 TEST0
16 TEST1
17 TEST2
18 CVBS
VST 9
20 SIF
C141
100n 10V
5V_DRX
C128 10V 100n L112 L114 S118 S119 SHOUL BE CONNECTED TO DRX GND
Q108 BC848B C144
R151 33k 100n 10V RESET_IC SHEET3
IF2/GND 10
L100 1uC134
IF1 11
1 Q103 BC848B R129 330R 2 3 6 S126 5 4 ACTIVE_ANT. PTC RES R133 3k3 R134 1R 3V3_DRX
Q105
100n 10V
5V_DRX
5V_TUNER QSS
10k R127 5V_TUNER C117 C118 R123 10k
Q104 BC848B
R130 10k Q106 BC857B R137 100R
R141 47R
FDC642P
VCC_8V_VIDEO
C135
S121 shortcir. R131 3k3
Q107 10u 16V BC848B R143 75R TUNER_CVBS_IN 1k R142 SHEET 3
100n 10V
IC101SCLK_TUNER SHEET3
1
2Y1
VCC 16
5V_TUNER
SCL_5V_IC 2 2Y0
S107
2Z 15
antenna_control
AGC_DVB
3
3Y1
1Z 14
4
S100
3Z
1Y1 13
SDATA_TUNER
74HCT4053
5 3Y0 1Y0 12 SDA_5V_IC
D100 1N4148
S102 AGC_DVB
6
E
S1 11
7
VEE
S2 10
TV/DVB_SWITCH
S111
S101
10k R128
R132 6k8
100n 10V
shortcir.
FROM 100 to 150
VESTELELECTRONICS
R110 4k7 R111 33k 5V_TUNER SYNC_SW2
8
GND
S3
9
C108 100n 10V Q100 BC848B
17MB12-1 TUNER-DRX.1of13
Date Author ISMAIL YILMAZLAR SADIK SEHIT
17.04.2007
TV_LINK_3V
SC2_SVHS_C
VCC_5V_VIDEO
VCC_3V3 VCC_5V_VIDEO VCC_5V 10u L233 C288 25V 10u VCC_5V_EXT
TO SHT7
SC2_PIN8
TO SHT3
SC2_AUDIO_R_IN
SC2_AUDIO_L_IN
SC2_CVBS_IN
3V3_STBY
TO SHT7...
Regístrate para leer el documento completo.