Le Agua

HI1175
TM

Data Sheet

September 2000

File Number

3577.7

8-Bit, 20 MSPS, Flash A/D Converter
The HI1175 is an 8-bit, analog-to-digital converter built in a 1.4µm CMOS process. The low power, low differential gain and phase, high sampling rate, and single 5V supply make the HI1175 ideal for video and imaging applications. The adoption of a 2-step flash architecture achieves low powerconsumption (60mW) at a maximum conversion speed of 20 MSPS (Min), 35 MSPS typical with only a 2.5 clock cycle data latency. The HI1175 also features digital output enable/disable and a built in voltage reference. The HI1175 can be configured to use the internal reference or an external reference if higher precision is required.

Features
• Resolution . . . . . . . . . . . . . . . . . . . .8-Bit ±0.3 LSB (DNL) • Maximum Sampling Frequency . . . . . . . . . . . . . .20MSPS • Low Power Consumption . . . . . . 60mW (at 20MSPS Typ) (Reference Current Excluded) • Built-In Sample and Hold Circuit • Built-In Reference Voltage Self Bias Circuit • Three-State TTL Compatible Output • Single +5V Power Supply • Low Input Capacitance . . . . . . . . . . . . . . . . . . . 11pF (Typ)

OrderingInformation
PART NUMBER HI1175JCB HI1175-EV TEMP. RANGE (oC) -40 to 85 25 PACKAGE 24 Ld SOIC Evaluation Board PKG. NO. M24.2-S

• Reference Impedance . . . . . . . . . . . . . . . . . . . 300Ω (Typ) • Evaluation Board Available (HI1175-EV) • Low Cost • Direct Replacement for the Sony CXD1175

Applications
• Video Digitizing • PC Video Capture • Image Scanners • TV Set Top Boxes • Multimedia •Personal Communication Systems (PCS)

Pinout
HI1175 (SOIC) TOP VIEW
OE DVSS D0 (LSB) D1 D2 D3 D4 D5 D6 D7 (MSB) DVDD CLK 1 2 3 4 5 6 7 8 9 10 11 12 24 DVSS 23 VRB 22 VRBS 21 AVSS 20 AVSS 19 VIN 18 AVDD 17 VRT 16 VRTS 15 AVDD 14 AVDD 13 DVDD

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CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Intersiland Design is a trademark of Intersil Corporation. | Copyright © Intersil Corporation 2000

HI1175 Functional Block Diagram
OE DVSS D0 (LSB) D1 D2 D3 D4 D5 D6 1 2 3 4 5 6 7 8 9 UPPER DATA LATCHES LOWER DATA LATCHES LOWER ENCODER (4-BIT) LOWER COMPARATORS WITH S/H (4-BIT) REFERENCE VOLTAGE 24 DVSS 23 VRB 22 VRBS 0.6V (Typ)

21 AVSS 20 AVSS

LOWER ENCODER (4-BIT)

LOWER COMPARATORS WITH S/H(4-BIT)

19 VIN 18 AVDD 17 VRT

D7 (MSB) 10 DVDD 11 CLK 12 CLOCK GENERATOR

UPPER ENCODER (4-BIT)

UPPER COMPARATORS WITH S/H (4-BIT)

16

VRTS 2.6V (Typ)

15 AVDD 14 AVDD 13 DVDD

Typical Application Schematic
HC04 CA158A R4 + R11 R3 R5 + CA158A C12 0.1µF HA2544 VIN + R2 † C8 15 16 17 18 HI1175 19 20 R1 21 22 23 C11 0.1µF C7 + 4.7µF +5V 24 6 5 4 3 2 1 D3 D2 D1 D0 (LSB) 10 9 8 7D7 (MSB) D6 D5 D4 R13 C9 + 4.7µF C10 0.1µF 13 14 12 11 +5V CLOCK IN CLK +5V

ICL8069

R12

† : Ceramic Chip Capacitor 0.1µF.
: Analog GND. : Digital GND.

NOTE: It is necessary that AVDD and DVDD pins be driven from the same supply. The gain of analog input signal can be changed by adjusting the ratio of R2 to R1.

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HI1175 Pin Descriptions and Equivalent Circuits
PIN NUMBER 1SYMBOL OE EQUIVALENT CIRCUIT
DVDD

DESCRIPTION When OE = Low, Data is valid. When OE = High, D0 to D7 pins high impedance.

1

DVSS

2, 24 3-10

DVSS D0 to D7

Digital GND. D0 (LSB) to D7 (MSB) Output.

D1

11, 13 12

DVDD CLK
DVDD

Digital +5V. Clock Input.

12

DVSS

16

VRTS

AVDD

Shorted with VRT generates, +2.6V.

16

17 23

VRT VRB
17

AVDDReference Voltage (Top). Reference Voltage (Bottom).
23

AVSS

14, 15, 18 19

AVDD VIN
AVDD

Analog +5V. Analog Input.

19

AVSS

20, 21 22

AVSS VRBS
AVSS

Analog GND. Shorted with VRB generates +0.6V.

22

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HI1175
Absolute Maximum Ratings
Supply Voltage, VDD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7V Reference Voltage, VRT, VRB . . . . ....