Titulo

Princess Sumaya University for Technology King Abdullah II School for Electrical Engineering Computer Engineering Department

Logic and Computer Organization Lab
(EE 4349)

Experiments Manual

Edited by: Eng. Hussam Kharouf

Spring 2009/2010

Lab. Experiments: Introduction: A-Understanding IC's………………………………2 B- Wiring IC's……………………………………...5 Experiment 1 Basic Logic Gates.................................................. 10 Experiment 2 Adders and Subtractors .......................................... 15 Experiment 3 Seven Segment Display Decoder ........................... 17 Experiment 4 Decoder and Multiplexer........................................ 19 Experiment 5 Sequential Circuits ................................................. 21 Experiment 6 Registers................................................................. 23 Experiment 7 RAM /ROM ........................................................... 25 Appendix 1: Datasheets………………………………………….28

Grading System: Reports: Performance: Prelabs & Quizzes: Mid term exam: 50% 10% 20% 20%

Introduction A-Understanding IC's
Logic Gates and Integrated Circuits Digital circuits are hardware components that areimplemented using transistors and interconnections in complex semiconductor devices called integrated-circuits. Digital circuits work in binary logic domain which uses two discrete values, TRUE (High) and FALSE (Low). We can also refer to these values as 1(High) and 0 (Low). Logic-Gates are basic building blocks of digital circuits. Using these building blocks, complex functions or larger digitalcircuits can be built. Examples of the basic logic gates are AND, OR, NOT, NAND and NOR. A complex gate such as an XOR gate can be built out of these basic gates. Each logic gate is actually implemented in part of an integrated circuit (IC), with each gate made using several transistors. For the most part we do not need to concern ourselves with the actual circuitry inside each gate, only theinterconnections between individual gates. Usually each IC package contains several individual gates. The 7408 chip implements 4 two input AND gates and is commonly referred to as a “Quad two input AND” chip. Similarly the 7432 chip is a “Quad 2 input OR” chip while the 7404 chip is a “Hex Inverter” since it contains 6 inverters. The IEEE standard logic symbols for each of these devices are shown inFigure 1.

Y=A.B

Y=A+B

Y=A’

Figure 1: Standard Logic Symbols

Each of the chips in Figure 1 is available in 14 pin Dual-In-Line packages or DIPs. In a popular logic family called TTL (Transistor-Transistor Logic), the low logic level is assigned to 0V and the high logic level is assigned to 5V. Each IC or chip has an ID number that can be referenced in IC Data Book. From the book, you canget the pin configuration of that chip. The pin numbers assigned to each logic signal are shown inside brackets in the figure. The pins are numbered as shown in Figure 2. Pin 1 is usually identified as the pin to the left of an indentation or cutout in one end of the chip

that is visible when the chip is viewed from the top. Occasionally, it is also identified by a printed or indented dotplaced just next to it.

Figure 2: Identifying Pin 1

Figure 3: A Quad 2-input AND gate chip

Figure 3, shows an IC which contains four 2-input AND gates. You will notice that pins 7 and 14 show no connections. In 14 pin DIP packages, pin 7 is usually connected to ground (Gnd), and pin 14 is usually connected to the power supply (Vdd). These connections must be made or the chip will not work.Take care not to connect pin 7 to power and pin 14 to ground, or to connect the outputs of two or more gates together. In complex ICs more than one pin can be dedicated for power (VDD) as well as ground. In the simpler gates that we will be using in this experiment, the ICs require only one pin for power (VDD) and another for ground (GND). The power supply (VDD) voltage is typically +5Volts, 3.3...