Unidad Aritmetica Logica

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EE201: Digital Circuits and Systems


Section 3 – Arithmetic Logic Unit


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3.1 ALU

Definition

• Key processing element of a microprocessor that performs arithmetic and logic operations


Description

• Directed by Control Unit, ALU performs operations such as ADD, SUB, NOT, OR, AND, XOR


• Data is inputted from andoutputted to the Register Array


• Control Signals from Control Unit determine what type of operation is performed


• Input data consists of two operands: operand A and operand B stored in registers and having n bits


• Output data consists of result S


• ALU also outputs Status Signals such as:
o Zero (when theresult of the operation is 0)
o Negative (when the operation result is < 0)
o Carry (when the operation results in carry)
o Overflow (when the result exceeds the number of bits allocated for its storage)
o Etc.
3.2 Addition

3.2.1 Ripple Carry Adder (RCA)

RCA Goal:
RCA Cell:

RCA [pic]Cell Minimisations andImplementation:
Sum Logic

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Carry Logic



















Example

An 8-bit RCA Adder is implemented using 2-input NAND technology. The delay of each NAND gate is given as 500 pS. After what time will a valid result be visible at the output?

NAND Logic
Use NAND gates to derive other logic gates and functions…
AND GATE
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OR GATE
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Each Carry Bit willpass through 4 500pS NAND gates

d=4x500 = 2000pS

Adder delay: 2000 * n = 2000 * 8
=> 16000 pS or 16nS


3.2.2 Carry Look-ahead Adder (CLA)

CLA Rationale:


• RCA sequentially computes carry bits and based on them addition result bits, causing long delays
• Delay can be reduced by examining all inputs simultaneously and producing the carry bits for eachnext stage

CLA Principle:

We notice that a carry is produced in stage i if:
• Stage i generates a carry
• Stages i-1 generates a carry and stage i propagates it
• Stage i-2 generates a carry and stages i and i-1 propagate it
• Etc.

A carry is generated only if both Ai and Bi are 1:

• Gi = Ai Bi

A carry is propagated ifcarry is not generated and at least one of Ai and Bi is 1:

• Pi = !Ai Bi + Ai !Bi

Carry for stage i:

• Ci = Gi + Pi Ci-1
CLA Cell:
CLA Cell Implementation:



4-Bit CLA Carry Implementation:

C0 = G0 + P0 C-1

C1 = G1 + P1 C0
= G1 + P1 (G0 + P0 C-1)
= G1 + P1G0 + P1P0 C-1

C2 = G2 + P2 C1
= G2 + P2 (G1 + P1G0 + P1P0 C-1)
= G2 + P2G1 + P2P1G0 +P2P1P0 C-1

C3 = G3 + P3 C2
=G3 +P3 (G2 + P2G1 + P2P1G0 + P2P1P0 C-1)
= G3 + P3G2 + P3P2G1 + P3P2P1G0 + P3P2P1P0 C-1

CLA Advantages:
• Any Carry Bit, Ci requires only 2 gate levels.
• To produce Gi or Pi from Ai and Bi => 1 level
• Parallelizes operation to improve time.
• Lower delay => faster result


CLA Disadvantages:
• Above C3, equationsget very complex.
• Gates with high number of inputs slower.
• Additional Logic => Larger Area, More Power
Accumulator

Rationale:
• Many calculations consist of repeated additions and subtractions performed on the result of the previous operation.
• Accumulator (ACC) is dedicated register used to perform these repeated operations.


[pic]Usage:
1. Initialise ACC with base value from memory.
2. Each instruction will then either add or subtract from ACC base value.
3. When finished, Store ACC value to Data Memory.


3.3 Multiplication

3.3.1 Binary Multiplication

Method:
• Multiplication can be performed by treating the multiplier unit as a combinational circuit, multiplicand...