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The Cobalt® Architecture Features and Implementation
Cobalt Architectural Features
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Cobalt Performance Features
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Xilinx Virtex-6 FPGA Configurable memory resources On-board clocking and synchronization Modular I/O design to support a wide range of signal types

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A/D sampling rates from 10 MHz to 3 GHz D/A sampling rates up to 1.25 GHz Powerful linked-list DMAengines PCI Express as the primary control and data transfer interface Secondary serial gigabit interface Available in XMC, PCI Express, OpenVPX and CompactPCI formats Available in commercial and in several ruggedization levels up to and including conduction cooling

Memory Memory Resources
These two smaller boards are used for the memory resources allowing for customization of two types ofmemory.

I/O Module
The I/O module is a separate printedcircuit board that caries all of the Cobalt’s analog interface circuitry providing excellent isolation from noise. Typical front panel signals include analog in and out, clocking, sync and triggering.

Main Board
The main board serves as the foundation of all Cobalt products. It houses the FPGA, FLASH memory, XMC interfaces, user programmableFPGA interfaces and hosts the memory and I/O modules.

Flexible Architecture
The modularity of this assembly offers an unprecedented degree of flexibility for creating modules with completely different features by just incorporating different I/O modules. As shown in the diagram, the front panel allows for a maximum of six SSMC signal connectors. The external clocking, trigger andsynchronization connector is a multipin flat cable connector and is the same on all models.

Copyright © 2011 Pentek, Inc. All rights reserved. Contents of this publication may not be reproduced without written permission. Specifications and prices are subject to change without notice. Pentek, ReadyFlow, GateFlow, SystemFlow, RTS, and Cobalt are registered trademarks of Pentek, Inc. Other trademarks areproperties of their respective owners. Printed in U.S.A. Worldwide distribution and support T-Cobalt-04-11

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The Cobalt Architecture Circuitry Components and Circuitry
Cobalt I/O Module
Shown here is a typical Cobalt I/O module. The input analog ports are transformer-coupled to two high-speed A/D converters. The digital outputs are delivered into the Virtex-6 FPGA for signal processing, datacapture or for routing to other module resources. Besides the two A/Ds, the typical module could include one DUC (Digital Upconverter), and two D/As which are transformer-coupled to the output analog ports. In addition to the input and output ports, the module includes a multiport connector for clocking and synchronization. All connectors are on the front panel.

Clocking and SynchronizationThe internal timing buses provide either a single clock or two different clock rates to the A/D and D/A signal paths. The timing bus includes a clock, sync and a gate or trigger signal. An on-board clock generator receives an external sample clock which can be used directly for either the A/D or D/A sections or can be divided by a built-in clock synthesizer circuit to provide different A/D and D/Aclocks. In an alternate mode, the sample clock can be sourced from an onboard programmable VCXO (Voltage-Controlled Crystal Oscillator). In this mode, the synthesizer locks the VCXO to an external system reference, typically 10 MHz. ➤ ➤ A front panel 26-pin LVPECL Clock/ Sync connector allows multiple boards to be synchronized. In the slave mode, it accepts LVPECL inputs that drive the clock, syncand gate signals. In the master mode, the LVPECL bus can drive the timing signals for synchronizing multiple boards.

Sample Clk / Reference Clk In

RF In

RF In

RF Out

RF Out

TTL Gate / Trig TTL Sync / PPS Sample Clk Reset Gate A/D Gate D/A Sync / PPS A/D Sync / PPS D/A
RF XFORMR RF XFORMR RF XFORMR RF XFORMR

Xilinx Virtex-6 FPGA
The Virtex-6 FPGA can be populated with a...