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Microcomputer Components
8-Bit CMOS Microcontroller

C502

Data Sheet 08.94

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8-Bit CMOS Microcontroller

C502

Preliminary
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Fully compatible to standard 8051 microcontroller Versions for 12 / 20 MHz operating frequency 16 K × 8 ROM (SAB-C502-2R only) 256 × 8 RAM 256 × 8 XRAM (additionalon-chip RAM) Eight datapointers for indirect addressing of program and external data memory (including XRAM) Four 8-bit ports Three 16 -bit Timers / Counters (Timer 2 with Up/Down Counter feature) USART with programmable 10-bit Baudrate-Generator Six interrupt sources, two priority levels Programmable 15-bit Watchdog Timer Oscillator Watchdog Fast Power On Reset Power Saving Modes P-DIP-40 packageand P-LCC-44 package TA: 0 ˚C to 70 ˚C Temperature ranges: SAB-C502 TA: – 40 ˚C to 85 ˚C SAF-C502

SAB-C502

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08.94

C502

The SAB-C502-L/C502-2R described in this document is compatible with the SAB 80C52 and can be used for all present SAB 80C52 applications. The SAB-C502-2R contains a non-volatile 16 K × 8 read-only program memory, a volatile 256 × 8 read/writedata memory, four ports, three 16-bit timers/counters, a six source, two priority level interrupt structure, a serial port and versatile fail save mechanisms. The SAB-C502-L/C502-2R incorporates 256 × 8 additional on-chip RAM called XRAM. For higher performance eight datapointers are implemented. The SAB-C502-L is identical, except that it lacks the program memory on chip. Therefore the termSAB-C502 refers to both versions within this specification unless otherwise noted.

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Ordering Information Type SAB-C502-LN SAB-C502-LP SAB-C502-2RN SAB-C502-2RP SAB-C502-L20N SAB-C502-L20P SAB-C502-2R20N SAB-C502-2R20P SAF-C502-LN SAF-C502-LP SAF-C502-2RN SAF-C502-2RP SAF-C502-L20N SAF-C502-L20P SAF-C502-2R20N SAF-C502-2R20P Ordering Code Q67120-C838 Q67120-C889Q67120-C839 Q67120-C890 Q67120-C885 Q67120-C891 Q67120-C884 Q67120-C892 Q67120-C883 Q67120-C893 Q67120-C886 Q67120-C894 Q67120-C887 Q67120-C895 Q67120-C888 Q67120-C896 Package P-LCC-44 P-DIP-40 P-LCC-44 P-DIP-40 P-LCC-44 P-DIP-40 P-LCC-44 P-DIP-40 P-LCC-44 P-DIP-40 P-LCC-44 P-DIP-40 P-LCC-44 P-DIP-40 P-LCC-44 P-DIP-40 Description (8-Bit CMOS microcontroller) for external memory 12 MHz withmask-programmable ROM, 12 MHz for external memory 20 MHz with mask-programmable ROM, 20 MHz for external ROM, 12 MHz, ext. temp. – 40 ˚C to 85 ˚C with mask-programmable ROM, 12 MHz, ext. temp. – 40 ˚C to 85 ˚C for external memory, 20 MHz, ext. temp. – 40 ˚C to 85 ˚C with mask-programmable ROM, 20 MHz, ext. temp. – 40 ˚C to 85 ˚C

Note: Extended temperature range – 40 ˚C to 110 ˚C (SAH-C502) on request.Semiconductor Group

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Pin Configuration (top view) (P-LCC-44)

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C502

Pin Configuration (top view) (P-DIP-40)

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Logic Symbol

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Pin Definitions and Functions Symbol P1.7 – P1.0 9–2 Pin Number P-LCC-44 P-DIP-40 8–1 I Port 1 is a bidirectional I/O port with internal pull-upresistors. Port 1 pins that have 1s written to them are pulled high by the internal pull-up resistors, and in that state can be used as inputs. As inputs, port 1 pins being externally pulled low will source current (IIL, in the DC characteristics) because of the internal pull-up resistors. Port 1 also contains the timer 2 pins as secondary function. The output latch corresponding to a secondaryfunction must be programmed to a one (1) for that function to operate. The secondary functions are assigned to the pins of port 1, as follows: 2 3 1 2 P1.0 T2 Input to counter 2 P1.1 T2EX Capture - Reload trigger of timer 2 / Up-Down count I/O*) Function

*) I = Input O = Output

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Pin Definitions and Functions (cont’d) Symbol P3.0 – P3.7 Pin Number P-LCC-44...
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