Data Mps430
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Publicado: 12 de marzo de 2013
MSP430x2xx Family
User's Guide
Literature Number: SLAU144I December 2004 – Revised January 2012
2
Copyright © 2004–2012, Texas Instruments Incorporated
SLAU144I – December 2004 – Revised January 2012 Submit Documentation Feedback
Contents
Preface...................................................................................................................................... 23 1 Introduction ...................................................................................................................... 25
1.1 1.2 1.3 1.4 Architecture ................................................................................................................. Flexible Clock System.................................................................................................... Embedded Emulation ..................................................................................................... Address Space ............................................................................................................. 1.4.1 Flash/ROM ........................................................................................................ 1.4.2 RAM................................................................................................................ 1.4.3 Peripheral Modules ............................................................................................... 1.4.4 Special Function Registers (SFRs) ............................................................................ 1.4.5 Memory Organization............................................................................................ MSP430x2xx Family Enhancements .................................................................................... System Reset and Initialization .......................................................................................... 2.1.1 Brownout Reset (BOR).......................................................................................... 2.1.2 Device Initial Conditions After System Reset ................................................................. Interrupts .................................................................................................................... 2.2.1 (Non)-Maskable Interrupts (NMI) ............................................................................... 2.2.2 MaskableInterrupts .............................................................................................. 2.2.3 Interrupt Processing .............................................................................................. 2.2.4 Interrupt Vectors .................................................................................................. Operating Modes.......................................................................................................... 2.3.1 Entering and Exiting Low-Power Modes ...................................................................... Principles for Low-Power Applications .................................................................................. Connection of Unused Pins.............................................................................................. CPU Introduction .......................................................................................................... CPU Registers ............................................................................................................. 3.2.1 Program Counter (PC) ...........................................................................................3.2.2 Stack Pointer (SP) ................................................................................................ 3.2.3 Status Register (SR) ............................................................................................. 3.2.4 Constant Generator Registers CG1 and CG2 ................................................................ 3.2.5 General-Purpose Registers R4 to R15...
User's Guide
Literature Number: SLAU144I December 2004 – Revised January 2012
2
Copyright © 2004–2012, Texas Instruments Incorporated
SLAU144I – December 2004 – Revised January 2012 Submit Documentation Feedback
Contents
Preface...................................................................................................................................... 23 1 Introduction ...................................................................................................................... 25
1.1 1.2 1.3 1.4 Architecture ................................................................................................................. Flexible Clock System.................................................................................................... Embedded Emulation ..................................................................................................... Address Space ............................................................................................................. 1.4.1 Flash/ROM ........................................................................................................ 1.4.2 RAM................................................................................................................ 1.4.3 Peripheral Modules ............................................................................................... 1.4.4 Special Function Registers (SFRs) ............................................................................ 1.4.5 Memory Organization............................................................................................ MSP430x2xx Family Enhancements .................................................................................... System Reset and Initialization .......................................................................................... 2.1.1 Brownout Reset (BOR).......................................................................................... 2.1.2 Device Initial Conditions After System Reset ................................................................. Interrupts .................................................................................................................... 2.2.1 (Non)-Maskable Interrupts (NMI) ............................................................................... 2.2.2 MaskableInterrupts .............................................................................................. 2.2.3 Interrupt Processing .............................................................................................. 2.2.4 Interrupt Vectors .................................................................................................. Operating Modes.......................................................................................................... 2.3.1 Entering and Exiting Low-Power Modes ...................................................................... Principles for Low-Power Applications .................................................................................. Connection of Unused Pins.............................................................................................. CPU Introduction .......................................................................................................... CPU Registers ............................................................................................................. 3.2.1 Program Counter (PC) ...........................................................................................3.2.2 Stack Pointer (SP) ................................................................................................ 3.2.3 Status Register (SR) ............................................................................................. 3.2.4 Constant Generator Registers CG1 and CG2 ................................................................ 3.2.5 General-Purpose Registers R4 to R15...
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