Hc12

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CPU12
Reference Manual

M68HC12 and HCS12 Microcontrollers

CPU12RM Rev. 4.0 03/2006

freescale.com

CPU12
Reference Manual

To provide the most up-to-date information, the revision of our documents on the World Wide Web will be the most current. Your printed copy may be an earlier revision. To verify you have the latest information available, refer to: http://www.freescale.com Thefollowing revision history table summarizes changes contained in this document. For your convenience, the page number designators have been linked to the appropriate location.

Revision History
Date April, 2002 Revision Level 3.0 Description Incorporated information covering HCS12 Family of 16-bit MCUs throughout the book. Updated to meet Freescale identity guidelines. March, 2006 4.0 MEMInstruction — Corrected bulleted listing under Description heading. 209 Page Number(s) Throughout Throughout

Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. © Freescale Semiconductor, Inc., 2002, 2006. All rights reserved. CPU12 Reference Manual, Rev. 4.0 Freescale Semiconductor 3

Revision History

CPU12 Reference Manual, Rev. 4.0 4 Freescale Semiconductor List of Chapters
Chapter 1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Chapter 2 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Chapter 3 Addressing Modes. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . .29 Chapter 4 Instruction Queue . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .41 Chapter 5 Instruction Set Overview. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47 Chapter 6 Instruction Glossary. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69 Chapter7 Exception Processing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 285 Chapter 8 Development and Debug Support. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 293 Chapter 9 Fuzzy Logic Support . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 309 Chapter 10 Memory Expansion . . . . . . . .. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 337 Appendix A Instruction Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 345 Appendix B M68HC11 to CPU12 Upgrade Path . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 377 Appendix C High-Level Language Support . . . . . . . . . . . . . . . . . . . . . . .. . . . . . . . . . . . . 393 Index . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 397

CPU12 Reference Manual, Rev. 4.0 Freescale Semiconductor 5

List of Chapters

CPU12 Reference Manual, Rev. 4.0 6 Freescale Semiconductor

Table of Contents
Chapter 1 Introduction
1.1 1.2 1.3 1.3.1 1.3.2 1.3.31.3.4 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Features. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Symbols and Notation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . . . . Abbreviations for System Resources . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Memory and Addressing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Operators . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ....
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