Ps2 keyboard

Simple PS/2 Interface
© ALSE – Bert Cuzeau – May 2003 - v1.1 No part of this project can be used or reproduced without the prior written consent of ALSE. http://www.alse-fr.com

Introduction
This Interface was created after the examination of an existing VHDL module (source unknown). Since this module was poorly coded and had no test bench, I wrote this small project in a couple of hours tolet it be used as a real interface, and for teaching purpose. I kept the original architecture (after some fixings in the VHDL style) under the name “Plain_Wrong” and wrote a new one under the name “ALSE_RTL”. Obviously, only the latter should be used ! “Plain_wrong” is left to compare both solutions and understand what errors were made (I inserted a few hints). I have then developed a moresophisticated controller (with bi-directional communication), which should probably be adopted in a serious design. If you are interested, please contact ALSE at mailto:info@alse-fr.com. As usual (especially for such simple functions), there is more complexity and more value in the simulation code (self-testing VHDL Test Bench) than in the RTL code. The test bench does include a behavioural model for aPS/2 Keyboard (transmit only). However, the structure used for the RTL description is suitable and efficient for much more complex tasks. It should be also very simple to add extra features to the code provided. As this is often the case, the “clean” solution is as compact (or more) than the “dirty” solution, it has more features (Parity + Overflow + Stop Bit errors detection), and it is easier toenhance or modify.

Features
Fully synchronous solution: one clock, one global reset. Suitable for PS/2 peripherals (keyboard, mouse…). PS/2_Clock is filtered digitally. Parity is verified Overflow detection (when the host does not read the value received in time). ALSE_RTL2 architecture only: timeout protection (against incomplete or wrong frames) Simplified interface: the host does not senddata to the peripheral, it can only receive data. This is viable for a Keyboard (though the LED indicators NumLock, ScrollLock, CapsLock can only be changed by the host). This poses more problem with the recent mice which require a complex dialog with the host before operating in the expected way. For details about the PS/2 serial bus format, please refer to some of the abundant literature widelyavailable. There is a good article from Adam Chapweske available at : http://govschl.ndsu.nodak.edu/~achapwes/PICmicro/PS2/ps2.htm in which information can be found on the connectors and cabling, the hardware interface, the protocol, details on mouse and keyboard data, etc… Note: we have left the digital filter on PS2_Clk though appropriate hardware (Schmidt trigger) should be used to ensure thatthe signal has steep enough edges, in which case a simple re-synchronizing + synchronous edge detection (2 Flip-Flops) would suffice. The larger of the shift register used as a digital filter could/should be reduced when the system clock is very slow (like 1 MHz or less). This module can also be used as a transparent “spy”, to listen to the traffic on a PS/2 port.
© ALSE - http://www.alse- fr.com1

Module Description
PS2_CTRL DoRead

The graphic symbol of the Controller is represented on the right, with inputs on the left side, and outputs on the right side. Reset is used inside the module as an asynchronous and global reset.

PS2_Clk PS2_Data Clk Reset

PS2_Clk PS2_Data Clk Reset

Scan_DAV Scan_Err Scan_Code[7:0]

I3

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Clk PS2_Clk, and PS2_DataDoRead

is the sole clocking source for all the Flip-Flops (fully synchronous design).

are the two signal lines of the PS/2 Interface. They are inputs (only) to our module. is an input pulsed by the user when the Data out code is read. This clears the Scan_DAV bit.

The outputs are: Scan_DAV Scan_Err Goes to 1 when a word has been received. Remains there until DoRead is asserted then...