Simulacion
Product specification
Thyristor
logic level
GENERAL DESCRIPTION
Glass passivated, sensitive gate
thyristor in a plastic envelope, suitable
for surface mounting, intended for use
in general purpose switching and
phase control applications. This
device is intended to be interfaced
directly to microcontrollers, logic
integrated circuits and other low
powergate trigger circuits.
PINNING - SOT223
PIN
BT169W Series
QUICK REFERENCE DATA
SYMBOL
VDRM,
VRRM
IT(AV)
IT(RMS)
ITSM
PARAMETER
BT169
Repetitive peak
off-state voltages
Average on-state
current
RMS on-state current
Non-repetitive peak
on-state current
EW
500
GW
600
V
0.5
0.5
0.5
0.5
A
0.8
8
0.8
8
0.8
8
0.8
8
A
A
SYMBOL
4anode
3
DW
400
cathode
2
BW
200
PIN CONFIGURATION
DESCRIPTION
1
MAX. MAX. MAX. MAX. UNIT
gate
tab
anode
a
2
1
k
g
3
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134).
SYMBOL
PARAMETER
CONDITIONS
MIN.
VDRM, VRRM Repetitive peak off-state
voltages
IT(AV)
Average on-state currentIT(RMS)
ITSM
RMS on-state current
Non-repetitive peak
on-state current
I2t
dIT/dt
IGM
VGM
VRGM
PGM
PG(AV)
Tstg
Tj
half sine wave;
Tsp ≤ 112 ˚C
all conduction angles
half sine wave;
Tj = 25 ˚C prior to surge
t = 10 ms
t = 8.3 ms
t = 10 ms
ITM = 2 A; IG = 10 mA;
dIG/dt = 100 mA/µs
I2t for fusing
Repetitive rate of rise of
on-state current after
triggering
Peak gatecurrent
Peak gate voltage
Peak reverse gate voltage
Peak gate power
Average gate power
over any 20 ms period
Storage temperature
Operating junction
temperature
MAX.
B
2001
D
4001
E
5001
UNIT
G
6001
V
-
0.63
A
-
1
A
-
8
9
0.32
50
A
A
A2s
A/µs
-40
-
1
5
5
2
0.1
150
125
A
V
V
W
W
˚C
˚C
1 Although not recommended,off-state voltages up to 800V may be applied without damage, but the thyristor may
switch to the on-state. The rate of rise of current should not exceed 15 A/µs.
September 1997
1
Rev 1.200
Philips Semiconductors
Product specification
Thyristor
logic level
BT169W Series
THERMAL RESISTANCES
SYMBOL
PARAMETER
Rth j-sp
Thermal resistance
junction to solder pointThermal resistance
junction to ambient
Rth j-a
CONDITIONS
MIN.
MAX.
UNIT
-
-
15
K/W
-
156
70
-
K/W
K/W
MIN.
TYP.
MAX.
UNIT
0.2
50
2
2
1.35
0.5
0.3
200
6
5
1.5
0.8
-
µA
mA
mA
V
V
V
-
0.05
0.1
mA
MIN.
pcb mounted, minimum footprint
pcb mounted; pad area as in fig:14
TYP.
TYP.
MAX.
UNIT
-25
-
V/µs
-
2
-
µs
-
100
-
µs
STATIC CHARACTERISTICS
Tj = 25 ˚C unless otherwise stated
SYMBOL
PARAMETER
CONDITIONS
IGT
IL
IH
VT
VGT
Gate trigger current
Latching current
Holding current
On-state voltage
Gate trigger voltage
ID, IR
Off-state leakage current
VD = 12 V; IT = 10 mA; gate open circuit
VD = 12 V; IGT = 0.5 mA; RGK = 1kΩ
VD = 12 V; IGT = 0.5 mA; RGK = 1 kΩ
IT = 2 A
VD = 12 V; IT = 10 mA; gate open circuit
VD = VDRM(max); IT = 10 mA; Tj = 125 ˚C;
gate open circuit
VD = VDRM(max); VR = VRRM(max); Tj = 125 ˚C;
RGK = 1 kΩ
DYNAMIC CHARACTERISTICS
Tj = 25 ˚C unless otherwise stated
SYMBOL
PARAMETER
CONDITIONS
dVD/dt
Critical rate of rise of
off-state voltage
Gate controlled turn-on
timeCircuit commutated
turn-off time
VDM =67% VDRM(max); Tj = 125 ˚C;
exponential waveform; RGK = 1k Ω
ITM = 2 A; VD = VDRM(max); IG = 10 mA;
dIG/dt = 0.1 A/µs
VD = 67% VDRM(max); Tj = 125 ˚C;
ITM = 1.6 A; VR = 35 V; dITM/dt = 30 A/µs;
dVD/dt = 2 V/µs; RGK = 1 kΩ
tgt
tq
September 1997
2
Rev 1.200
Philips Semiconductors
Product specification
Thyristor
logic level
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